AD9553/PCBZ Analog Devices Inc, AD9553/PCBZ Datasheet - Page 2

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AD9553/PCBZ

Manufacturer Part Number
AD9553/PCBZ
Description
Clock Translator Eval. Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9553/PCBZ

Silicon Manufacturer
Analog Devices
Silicon Core Number
AD9553
Kit Application Type
Clock & Timing
Application Sub Type
Clock Translator
Peak Reflow Compatible (260 C)
Yes
Msl
MSL 3 - 168 Hours
Rohs Compliant
Yes
Development Tool Type
Hardware - Eval/Demo Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9553
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Basic Block Diagram ........................................................................ 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 11
Input/Output Termination Recommendations .......................... 15
REVISION HISTORY
10/10—Rev. 0 to Rev. A
Changes to Features Section, Applications Section, and General
Description Section .......................................................................... 1
Added Table Summary to Specifications Section ......................... 3
Added Supply Voltage Parameter, Table 1 ..................................... 3
Changes to Table 5 ............................................................................ 4
Changes to Table 6 and Crystal Load Capacitance Parameter,
Table 7 ................................................................................................ 5
Changes to Table 8 ............................................................................ 6
Changes to Table 9 ............................................................................ 7
Changes to Pin 1 and Pin 15, Table 13 ......................................... 10
Added Figure 4, Renumbered Sequentially ................................ 11
Added Figure 10, Figure 12, Figure 13, and Figure 14............... 12
Added Input/Output Termination Recommendations Section,
Figure 25, Figure 26, and Figure 27 .............................................. 15
Moved Theory of Operation and Figure 28 ................................ 16
Changed General Description Section to Overview Section and
Moved ............................................................................................... 16
Changes to Overview Section ....................................................... 16
Changes to Preset Frequencies Section and Table 14 ................ 17
Changes to Table 15 ........................................................................ 18
Power Consumption .................................................................... 3
Logic Input Pins ............................................................................ 3
Logic Output Pins ......................................................................... 3
RESET Pin ..................................................................................... 4
Reference Clock Input Characteristics ...................................... 4
VCO Characteristics .................................................................... 5
Crystal Input Characteristics ...................................................... 5
Output Characteristics ................................................................. 6
Jitter Characteristics ..................................................................... 7
Serial Control Port ....................................................................... 8
Serial Control Port Timing ......................................................... 8
ESD Caution .................................................................................. 9
Rev. A | Page 2 of 44
Theory of Operation ...................................................................... 16
Applications Information .............................................................. 29
Serial Control Port ......................................................................... 30
Register Map ................................................................................... 33
Outline Dimensions ....................................................................... 42
Changes to Table 16 ....................................................................... 19
Changes to PLL (PFD, Charge Pump, VCO, Feedback Divider
Section .............................................................................................. 22
Changes to Loop Filter Section, Figure 31, Table 17, PLL Locked
Indicator Section, and Output Dividers Section ........................ 23
Changes to Output Driver Mode Control Section ..................... 24
Changes to Output Driver Polarity (CMOS) Section ................ 25
Changes to Output/Input Frequency Relationship Section ...... 26
Changes to Calculating Divider Values Section ......................... 27
Changes to Automatic Power-On Reset Section ........................ 28
Changes to Thermal Performance Section ................................. 29
Changes to Address 0x18, Address 0x32, and Address 0x34,
Table 27 ............................................................................................ 33
Changes to Address 0x18, Table 31 .............................................. 37
Change to Address 0x20, Table 34 ............................................... 38
Changes to Address 0x24, Table 35 and Address 0x28, Table 36 ... 39
Changes to Address 0x32, Table 37 .............................................. 40
Changes to Address 0x34, Table 39 .............................................. 41
4/10—Revision 0: Initial Version
Overview ..................................................................................... 16
Preset Frequencies ...................................................................... 16
Device Control Modes ............................................................... 19
Description of Functional Blocks ............................................. 20
Jitter Tolerance ............................................................................ 26
Output/Input Frequency Relationship .................................... 26
Calculating Divider Values ....................................................... 27
Low Dropout (LDO) Regulators .............................................. 28
Automatic Power-On Reset ...................................................... 28
Thermal Performance ................................................................ 29
Serial Control Port Pin Descriptions ....................................... 30
Operation of the Serial Control Port ....................................... 30
Instruction Word (16 Bits) ........................................................ 31
MSB/LSB First Transfers ........................................................... 31
Register Map Descriptions ........................................................ 35
Ordering Guide .......................................................................... 42

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