ISP1508AET NXP Semiconductors, ISP1508AET Datasheet - Page 2

• Manufacturer Part Number: ISP1508AET
• Description: RF Transceiver USB 2.0 ULPI TRNSCVR
• Manufacturer: NXP Semiconductors

Specifications of ISP1508AET

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935283548118 ISP1508AET-T

NXP Semiconductors
ISP1508A_ISP1508B_1
Product data sheet
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Complete USB OTG physical front-end that supports Host Negotiation Protocol (HNP)
and Session Request Protocol (SRP)
Flexible system integration and very low power consumption, optimized for portable
devices
Highly optimized ULPI-compliant interface
UART interface:
Full industrial grade operating temperature range from 40 C to +85 C
ESD compliance:
Available in small TFBGA36 (3.5 mm
(RoHS) compliant, halogen-free and lead-free package
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Supports external charge pump or external V
Complete control over USB termination resistors
Data line and V
Integrated V
Integrated cable (ID) detector
3.0 V to 4.5 V power supply input range
Internal voltage regulator supplies 2.7 V or 3.3 V and 1.8 V
Supports interfacing I/O voltage of 1.4 V to 1.95 V; separate I/O voltage supply pins
minimize crosstalk
Power-down internal regulators in power-down mode when V
or the CHIP_SEL pin is not active
Typical operating current of 13 mA to 32 mA, depending on the USB speed and
bus utilization
Typical V
mode is 0.5 A
3-state ULPI interface by the CHIP_SEL pin, allowing bus reuse by other
applications
60 MHz, 8-pin or 12-pin interface between the core and the transceiver, including a
4-bit DDR bus or an 8-bit SDR bus
DDR or SDR interface selectable by pin
Supports 60 MHz output clock configuration
Integrated Phase-Locked Loop (PLL) supporting input clock frequencies of
13 MHz, 19.2 MHz, 24 MHz or 26 MHz
Crystal or clock frequency selectable by pin
Fully programmable ULPI-compliant register set
3-pin or 6-pin full-speed or low-speed serial mode
Internal Power-On Reset (POR) circuit
Supports transparent UART signaling on DP and DM for the UART accessory
application
2.7 V UART signaling on DP and DM
Entering UART mode by register setting
Exiting UART mode by asserting STP or by toggling the CHIP_SEL pin
JESD22-A114D 2 kV contact Human Body Model (HBM)
JESD22-A115-A 200 V Machine Model (MM)
JESD22-C101-A 500 V Charge Device Model (CDM)
IEC 61000-4-2 8 kV contact on the DP and DM pins
CC
power consumption in suspend mode is 70 A and in power-down
BUS
BUS
Rev. 01 — 14 August 2007
voltage comparators
pulsing session request methods
3.5 mm) Restriction of Hazardous Substances
ISP1508A; ISP1508B
BUS
power switch
ULPI HS USB transceiver
CC(I/O)
© NXP B.V. 2007. All rights reserved.
is not present
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