ISP1508AET NXP Semiconductors, ISP1508AET Datasheet - Page 82

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ISP1508AET

Manufacturer Part Number
ISP1508AET
Description
RF Transceiver USB 2.0 ULPI TRNSCVR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1508AET

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935283548118 ISP1508AET-T

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NXP Semiconductors
25. Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10. Signal mapping during low-power mode . . . . .22
Table 11. Signal mapping for 6-pin serial mode . . . . . . .23
Table 12. Signal mapping for 3-pin serial mode . . . . . . .23
Table 13. UART signal mapping . . . . . . . . . . . . . . . . . . .24
Table 14. Operating states and their corresponding
Table 15. TXCMD byte format . . . . . . . . . . . . . . . . . . . . .29
Table 16. RXCMD byte format . . . . . . . . . . . . . . . . . . . . .30
Table 17. LINESTATE[1:0] encoding for upstream
Table 18. LINESTATE[1:0] encoding for downstream
Table 19. Encoded V
Table 20. V
Table 21. Encoded USB event signals . . . . . . . . . . . . . .33
Table 22. PHY pipeline delays . . . . . . . . . . . . . . . . . . . . .37
Table 23. Link decision times . . . . . . . . . . . . . . . . . . . . .38
Table 24. Register map . . . . . . . . . . . . . . . . . . . . . . . . . .50
Table 25. Vendor ID Low register (address R = 00h)
Table 26. Vendor ID High register (address R = 01h)
Table 27. Product ID Low register (address R = 02h)
Table 28. Product ID High register (address R = 03h)
Table 29. Function Control register (address
Table 30. Function Control register (address
Table 31. Interface Control register (address
ISP1508A_ISP1508B_1
Product data sheet
Ordering information . . . . . . . . . . . . . . . . . . . . .3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .5
OTG Control register power control bits . . . . . .8
Recommended V
Allowed crystal or clock frequency on the
XTAL1 pin . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
External capacitor values for 13 MHz or
19.2 MHz clock frequency . . . . . . . . . . . . . . . .11
External capacitor values for 24 MHz or
26 MHz clock frequency . . . . . . . . . . . . . . . . .11
Pin states in power-down mode . . . . . . . . . . . .20
ULPI signal description . . . . . . . . . . . . . . . . . .21
resistor settings . . . . . . . . . . . . . . . . . . . . . . . .27
facing ports: peripheral . . . . . . . . . . . . . . . . . .30
facing ports: host . . . . . . . . . . . . . . . . . . . . . . .31
typical applications . . . . . . . . . . . . . . . . . . . . . .32
bit description . . . . . . . . . . . . . . . . . . . . . . . . .50
bit description . . . . . . . . . . . . . . . . . . . . . . . . .50
bit description . . . . . . . . . . . . . . . . . . . . . . . . .51
bit description . . . . . . . . . . . . . . . . . . . . . . . . .51
R = 04h to 06h, W = 04h, S = 05h, C = 06h)
bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .51
R = 04h to 06h, W = 04h, S = 05h, C = 06h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .51
R = 07h to 09h, W = 07h, S = 08h, C = 09h)
bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .52
BUS
indicators in RXCMD required for
BUS
voltage state . . . . . . . . . . . . . .31
BUS
capacitor value . . . . . . . .9
Rev. 01 — 14 August 2007
Table 32. Interface Control register (address R = 07h to
Table 33. OTG Control register (address R = 0Ah to
Table 34. OTG Control register (address R = 0Ah to
Table 35. USB Interrupt Enable Rising register (address
Table 36. USB Interrupt Enable Rising register (address
Table 37. USB Interrupt Enable Falling register (address
Table 38. USB Interrupt Enable Falling register (address
Table 39. USB Interrupt Status register (address
Table 40. USB Interrupt Status register (address
Table 41. USB Interrupt Latch register (address R = 14h)
Table 42. USB Interrupt Latch register (address R = 14h)
Table 43. Debug register (address R = 15h) bit
Table 44. Debug register (address R = 15h) bit
Table 45. Scratch register (address R = 16h to 18h,
Table 46. Carkit Control register (address R = 19h to
Table 47. Carkit Control register (address R = 19h to
Table 48. Power Control register (address R = 3Dh to
Table 49. Power Control register (address R = 3Dh to
Table 50. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . 59
09h, W = 07h, S = 08h, C = 09h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
0Ch, W = 0Ah, S = 0Bh, C = 0Ch) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
0Ch, W = 0Ah, S = 0Bh, C = 0Ch) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
R = 0Dh to 0Fh, W = 0Dh, S = 0Eh, C = 0Fh)
bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . 55
R = 0Dh to 0Fh, W = 0Dh, S = 0Eh, C = 0Fh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 55
R = 10h to 12h, W = 10h, S = 11h, C = 12h) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
R = 10h to 12h, W = 10h, S = 11h, C = 12h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
R = 13h) bit allocation . . . . . . . . . . . . . . . . . . . 56
R = 13h) bit description . . . . . . . . . . . . . . . . . . 56
bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . 56
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 57
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
W = 16h, S = 17h, C = 18h) bit description . . . 57
1Bh, W = 19h, S = 1Ah, C = 1Bh) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
1Bh, W = 19h, S = 1Ah, C = 1Bh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3Fh, W = 3Dh, S = 3Eh, C = 3Fh) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3Fh, W = 3Dh, S = 3Eh, C = 3Fh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
ISP1508A; ISP1508B
ULPI HS USB transceiver
© NXP B.V. 2007. All rights reserved.
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