ISP1508AET NXP Semiconductors, ISP1508AET Datasheet - Page 8

no-image

ISP1508AET

Manufacturer Part Number
ISP1508AET
Description
RF Transceiver USB 2.0 ULPI TRNSCVR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1508AET

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935283548118 ISP1508AET-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1508AET
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
ISP1508AETT
Manufacturer:
ST
0
Part Number:
ISP1508AETTM
Quantity:
3 770
Part Number:
ISP1508AETTM
Manufacturer:
ST
Quantity:
20 000
NXP Semiconductors
ISP1508A_ISP1508B_1
Product data sheet
7.3 RREF
7.4 DP and DM
7.5 FAULT
7.6 PSW_N
Resistor reference analog I/O pin. A 12 k
RREF pin and GND. This provides an accurate voltage reference that biases internal
analog circuitry. Less accurate resistors cannot be used. It will affect the biasing current
for analog circuits, thus the USB signal quality.
When the ISP1508 is in USB mode, the DP pin functions as the USB data plus line, and
the DM pin functions as the USB data minus line.
When the ISP1508 is in transparent UART mode, the DP pin functions as the UART RXD
input pin, and the DM pin functions as the UART TXD output pin.
The DP and DM pins must be connected to the D+ and D pins of the USB receptacle.
This pin is used to detect the V
be connected to ground to avoid floating input.
If an external V
that circuit can be connected to the FAULT input pin. The USE_EXT_VBUS_IND bit in the
OTG Control register and the IND_PASSTHRU bit in the Interface Control register need to
be set to logic 1. The ISP1508 will inform the link of V
RXCMDs on the ULPI bus.
The FAULT input pin is mapped to the A_VBUS_VLD bit in RXCMD. Any changes to the
FAULT input will trigger RXCMD carrying the FAULT condition with A_VBUS_VLD.
For details, see
The PSW_N pin is an active-LOW open-drain output pin. It is used to control external
charge pumps or V
resistor is required. This allows for per-port or ganged power control.
To enable the external power source by driving PSW_N to LOW, the link must set the
DRV_VBUS_EXT bit in the OTG Control register to logic 1.
Table 3
Table 3.
DRV_VBUS_EXT
0
1
summarizes settings to drive 5 V on V
OTG Control register power control bits
BUS
Section 10.2.2.2
overcurrent or fault detection circuit is used, the output fault indicator of
BUS
Power source used
external 5 V V
external 5 V V
Rev. 01 — 14 August 2007
power switches to supply V
BUS
and
BUS
BUS
fault condition. If the function is not used, this pin must
power source disabled (PSW_N = HIGH)
power source enabled (PSW_N = LOW)
Section
1 % resistor must be connected between the
ISP1508A; ISP1508B
10.2.2.3.
BUS
.
BUS
BUS
. When in use, external pull-up
fault events by sending
ULPI HS USB transceiver
© NXP B.V. 2007. All rights reserved.
8 of 86

Related parts for ISP1508AET