LFE2M20E-6FN484C LATTICE SEMICONDUCTOR, LFE2M20E-6FN484C Datasheet - Page 237

• Manufacturer Part Number: LFE2M20E-6FN484C
• Description: FPGA LatticeECP2M Family 19000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFE2M20E-6FN484C

• Package: 484FBGA
• Family Name: LatticeECP2M
• Device Logic Units: 19000
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 304
• Ram Bits: 1246208

Lattice Semiconductor
LFE2M-20E/SE and LFE2M-35E/SE Logic Signal Connections: 256 fpBGA
Number
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
Ball
A2
B2
D3
C2
E4
E5
B1
C1
D2
D1
E1
F1
F3
F2
F6
F5
G4
G3
G1
G2
H1
H2
H3
G6
H6
K1
H4
H5
K4
K3
K2
J1
J2
J4
J6
J5
L1
Function
Ball/Pad
GNDIO7
GNDIO7
GNDIO7
GNDIO7
GNDIO6
GNDIO6
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO6
VCCIO6
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL24A
PL24B
PL25A
PL25B
PL27A
PL27B
PL28A
PL28B
PL31A
PL31B
PL32A
PL32B
PL42A
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL5A
PL5B
PL6A
PL6B
PL7A
PL7B
PL8A
PL8B
PL9A
PL9B
LFE2M20E/SE
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
6
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
-
-
-
-
-
-
LUM0_SPLLC_FB_A
LUM0_SPLLT_FB_A
LLM1_SPLLC_FB_A
LUM0_SPLLC_IN_A
LLM1_SPLLT_FB_A
LUM0_SPLLT_IN_A
LLM1_SPLLC_IN_A
LLM1_SPLLT_IN_A
LLM0_GPLLT_IN_A
PCLKC7_0/LDQ22
PCLKT7_0/LDQ22
VREF2_7/LDQ6
VREF1_7/LDQ6
Dual Function
PCLKC6_0
PCLKT6_0
VREF2_6
VREF1_6
LDQS6
LDQ22
LDQ22
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
T
C
T
C
T
C
T
C
T
C
T
T
T
T
C
4-134
Function
Ball/Pad
GNDIO7
GNDIO7
GNDIO7
GNDIO7
GNDIO6
GNDIO6
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO6
VCCIO6
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL34A
PL34B
PL35A
PL35B
PL37A
PL37B
PL38A
PL38B
PL41A
PL41B
PL42A
PL42B
PL57A
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL5A
PL5B
PL6A
PL6B
PL7A
PL7B
PL8A
PL8B
PL9A
PL9B
LatticeECP2/M Family Data Sheet
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
6
6
6
6
6
6
-
-
-
-
-
-
LLM0_GPLLT_IN_A**/LDQS57***
LFE2M35E/SE
LUM0_SPLLC_FB_A/LDQ15
LUM0_SPLLC_IN_A/LDQ15
LUM0_SPLLT_FB_A/LDQ15
LUM0_SPLLT_IN_A/LDQ15
LLM2_SPLLC_FB_A
LLM2_SPLLT_FB_A
LLM2_SPLLC_IN_A
LLM2_SPLLT_IN_A
PCLKC7_0/LDQ32
PCLKT7_0/LDQ32
VREF2_7/LDQ6
VREF1_7/LDQ6
PCLKC6_0
PCLKT6_0
VREF2_6
VREF1_6
Function
LDQS6
LDQ15
LDQ15
LDQ15
LDQ15
LDQ32
LDQ32
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
LDQ6
Dual
Pinout Information
Differential
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C(LVDS)*
C(LVDS)*
C(LVDS)*
C(LVDS)*
C(LVDS)*
C(LVDS)*
C(LVDS)*
C(LVDS)*
C(LVDS)*
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T