16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part NumberPIC24HJ64GP510A-E/PF
Description16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
ManufacturerMicrochip Technology
SeriesPIC® 24H
PIC24HJ64GP510A-E/PF datasheets
 


Specifications of PIC24HJ64GP510A-E/PF

Core ProcessorPICCore Size16-Bit
Speed40 MIPsConnectivityCAN, I²C, IrDA, LIN, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDTNumber Of I /o85
Program Memory Size64KB (22K x 24)Program Memory TypeFLASH
Ram Size8K x 8Voltage - Supply (vcc/vdd)3 V ~ 3.6 V
Data ConvertersA/D 32x10b/12bOscillator TypeInternal
Operating Temperature-40°C ~ 125°CPackage / Case100-TQFP, 100-VQFP
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
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Page 48/84

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5.10
Verify Code Memory and
Configuration Word
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. The Configuration registers are
verified with the rest of the code.
The verify process is illustrated in
Figure
reads occur a single byte at a time, so two bytes must
be read to compare against the word in the program-
mer’s buffer. Refer to
Section 5.8 “Reading Code
Memory”
for implementation details of reading code
memory.
Note:
Because
the
Configuration
include the device code protection bit,
code
memory
should
immediately after writing, if the code
protection is enabled. This is because the
device will not be readable or verifiable if
a device Reset occurs after the code-pro-
tect bit in the FGS Configuration register
has been cleared.
FIGURE 5-9:
VERIFY CODE
MEMORY FLOW
Start
Set TBLPTR = 0
Read Low Byte
with Post-Increment
Read High Byte
with Post-Increment
Does
No
Word = Expect
Data?
Yes
All
No
code memory
verified?
Yes
End
DS70152H-page 48
5.11
Reading the Application ID Word
The Application ID Word is stored at address 0x8007F0
in executive code memory. To read this memory
location, you must use the SIX control code to move
this program memory location to the VISI register.
Then, the REGOUT control code must be used to clock
the contents of the VISI register out of the device. The
5-9. Memory
corresponding control and instruction codes that must
be serially transmitted to the device to perform this
operation are shown in
After the programmer has clocked out the Application
ID Word, it must be inspected. If the application ID has
the value 0xCB, the programming executive is resident
registers
in memory and the device can be programmed using
the mechanism described in
be
verified
Programming – Enhanced
application ID has any other value, the programming
executive is not resident in memory; it must be loaded
to memory before the device can be programmed. The
procedure for loading the programming executive to
memory is described in
the Programming Executive to
5.12
Exiting ICSP Mode
Exiting Program/Verify mode is done by removing V
from MCLR, as illustrated in
requirement for exit is that an interval P16 should
elapse between the last clock and program signals on
PGCx and PGDx before removing V
FIGURE 5-10:
MCLR
V
DD
PGDx
PGCx
Failure
Report Error
Table
5-10.
Section 3.0 “Device
ICSP”. However, if the
Section 6.0 “Programming
Memory”.
IH
Figure
5-10. The only
.
IH
EXITING ICSP™ MODE
P16
P17
V
IH
V
IH
PGDx = Input
© 2010 Microchip Technology Inc.