16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part NumberPIC24HJ64GP510A-E/PF
Description16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
ManufacturerMicrochip Technology
SeriesPIC® 24H
PIC24HJ64GP510A-E/PF datasheets
 


Specifications of PIC24HJ64GP510A-E/PF

Core ProcessorPICCore Size16-Bit
Speed40 MIPsConnectivityCAN, I²C, IrDA, LIN, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDTNumber Of I /o85
Program Memory Size64KB (22K x 24)Program Memory TypeFLASH
Ram Size8K x 8Voltage - Supply (vcc/vdd)3 V ~ 3.6 V
Data ConvertersA/D 32x10b/12bOscillator TypeInternal
Operating Temperature-40°C ~ 125°CPackage / Case100-TQFP, 100-VQFP
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Page 51
52
Page 52
53
Page 53
54
Page 54
55
Page 55
56
Page 56
57
Page 57
58
Page 58
59
Page 59
60
Page 60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Page 53/84

Download datasheet (2Mb)Embed
PrevNext
6.2
Programming Verification
After
the
programming
executive
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
TABLE 6-2:
READING EXECUTIVE MEMORY
Command
Data
(Binary)
(Hex)
Step 1: Exit the Reset vector.
0000
040200
GOTO
0000
040200
GOTO
0000
000000
NOP
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
200800
MOV
0000
880190
MOV
0000
EB0300
CLR
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
0000
EB0380
CLR
0000
000000
NOP
0000
BA1B96
TBLRDL
0000
000000
NOP
0000
000000
NOP
0000
BADBB6
TBLRDH.B
0000
000000
NOP
0000
000000
NOP
0000
BADBD6
TBLRDH.B
0000
000000
NOP
0000
000000
NOP
0000
BA1BB6
TBLRDL
0000
000000
NOP
0000
000000
NOP
0000
BA1B96
TBLRDL
0000
000000
NOP
0000
000000
NOP
0000
BADBB6
TBLRDH.B
0000
000000
NOP
0000
000000
NOP
0000
BADBD6
TBLRDH.B
0000
000000
NOP
0000
000000
NOP
0000
BA0BB6
TBLRDL
0000
000000
NOP
0000
000000
NOP
© 2010 Microchip Technology Inc.
Reading the contents of executive memory can be
performed using the same technique described in
has
been
Section 5.8 “Reading Code
for reading executive memory is shown in
Note that in Step 2, the TBLPAG register is set to 0x80,
such that executive memory may be read.
Description
0x200
0x200
#0x80, W0
W0, TBLPAG
W6
W7
[W6], [W7++]
[W6++], [W7++]
[++W6], [W7++]
[W6++], [W7++]
[W6], [W7++]
[W6++], [W7++]
[++W6], [W7++]
[W6++], [W7]
Memory”. A procedure
Table
6-2.
DS70152H-page 53