MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 1015

• Manufacturer Part Number: MC9S12XDT512CAA
• Manufacturer: Freescale

Specifications of MC9S12XDT512CAA

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

DDRH[7:0]
Reset
Reset
This register always reads back the buffered state of the associated pins. This can also be used to
detect overload or short circuit conditions on output pins.
24.0.5.44 Port H Data Direction Register (DDRH)
Read: Anytime.
Write: Anytime.
This register configures each port H pin as either input or output.
If the associated routed SPI module is enabled this register has no effect on the pins.
If a SPI module is enabled, the SPI determines the pin direction. Refer to SPI section for details.
The DDRH bits revert to controlling the I/O direction of a pin when the associated peripheral
modules are disabled.
Field
24.0.5.45 Port H Reduced Drive Register (RDRH)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each Port H output pin as either full or reduced. If the
port is used as input this bit is ignored.
7–0
W
W
R
R
DDRH7
RDRH7
Data Direction Port H
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is read
7
0
7
0
on PTH or PTIH registers, when changing the DDRH register.
DDRH6
RDRH6
0
0
6
6
Figure 24-47. Port H Reduced Drive Register (RDRH)
Figure 24-46. Port H Data Direction Register (DDRH)
Table 24-41. DDRH Field Descriptions
DDRH5
RDRH5
5
0
5
0
DDRH4
RDRH4
0
0
4
4
Description
DDRH3
RDRH3
3
0
3
0
DDRH2
RDRH2
0
0
2
2
DDRH1
RDRH1
1
0
1
0
DDRH0
RDRH0
0
0
0
0