MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 452
MC9S12XDT512CAA
Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDT512CAA.pdf
(1348 pages)
Specifications of MC9S12XDT512CAA
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
10.3.3.1.2
452
ID[10:3]
ID[6:0]
Field
Field
RTR
7:1
7:0
0
Reset:
Reset:
Reset:
W
W
W
R
R
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Remote Transmission Request — This flag reflects the status of the remote transmission request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
IDR0–IDR3 for Standard Identifier Mapping
ID10
ID6
ID2
x
x
x
7
Figure 10-29. Identifier Register 3 (IDR3) — Extended Identifier Mapping
7
7
Table 10-28. IDR3 Register Field Descriptions — Extended
Table 10-29. IDR0 Register Field Descriptions — Standard
Figure 10-30. Identifier Register 0 — Standard Mapping
Figure 10-31. Identifier Register 1 — Standard Mapping
= Unused; always read ‘x’
ID5
ID9
ID1
6
x
6
x
6
x
MC9S12XDP512 Data Sheet, Rev. 2.21
ID4
ID8
ID0
5
x
5
x
5
x
RTR
ID3
ID7
4
x
4
x
4
x
Description
Description
IDE (=0)
ID2
ID6
3
x
3
x
3
x
ID1
ID5
x
x
x
2
2
2
Table
Freescale Semiconductor
ID0
ID4
10-30.
x
x
x
1
1
1
RTR
ID3
x
x
x
0
0
0
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