MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 450

• Manufacturer Part Number: MC9S12XDT512CAA
• Manufacturer: Freescale

Specifications of MC9S12XDT512CAA

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
Read: For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 10.3.2.11, “MSCAN Transmit Buffer Selection Register
only when RXF flag is set (see
Write: For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 10.3.2.11, “MSCAN Transmit Buffer Selection Register
receive buffers.
Reset: Undefined (0x00XX) because of RAM-based implementation
10.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits; ID[28:0], SRR, IDE,
and RTR bits. The identifier registers for a standard format identifier consist of a total of 13 bits; ID[10:0],
RTR, and IDE bits.
10.3.3.1.1
450
Register
Name
IDR0
IDR1
IDR2
IDR3
Reset:
W
R
Identifier Registers (IDR0–IDR3)
Figure 10-25. Receive/Transmit Message Buffer — Standard Identifier Mapping
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
W
W
W
W
R
R
R
R
IDR0–IDR3 for Extended Identifier Mapping
ID28
x
7
Figure 10-26. Identifier Register 0 (IDR0) — Extended Identifier Mapping
Bit 7
ID10
ID2
ID27
= Unused, always read ‘x’
6
x
Section 10.3.2.5, “MSCAN Receiver Flag Register
ID9
ID1
6
MC9S12XDP512 Data Sheet, Rev. 2.21
ID26
5
x
ID8
ID0
5
ID25
4
x
RTR
ID7
4
ID24
IDE (=0)
Section 10.3.2.7, “MSCAN Transmitter
3
x
Section 10.3.2.7, “MSCAN Transmitter
(CANTBSEL)”). For receive buffers,
(CANTBSEL)”). Unimplemented for
ID6
3
ID23
x
2
ID5
2
(CANRFLG)”).
Freescale Semiconductor
ID22
ID4
x
1
1
ID21
Bit 0
ID3
x
0