MC68EC060RC50 Freescale Semiconductor, MC68EC060RC50 Datasheet - Page 305

• Manufacturer Part Number: MC68EC060RC50
• Description: IC MPU 32BIT 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

If the first instruction of each pair is contained in the pOEP and the second in the sOEP, test
5 fails for both pairs. For the first example, the base resource required by the sOEP conflicts
with the execute result generated by the pOEP instruction. In the second example, the index
resource required by the sOEP conflicts with the execute result from the pOEP instruction.
10.1.6 Dispatch Test 6: No Register Conflicts on sOEP.IEE Resources
This test validates that the register resources of the sOEP.IEE (A, B) do not conflict with the
execute result being generated by the instruction in the pOEP. Recall the most significant
bit of the resource name is asserted to indicate a register resource. Thus, this test can be
stated as:
There are two very important exceptions to this rule involving the MOVE instruction:
the result of the pOEP instruction is needed as an input to the sOEP.IEE and the sOEP
instruction is a move instruction. The destination operand for the memory write is sourced
directly from the pOEP execute result and the test succeeds.
Consider the following examples:
For all the examples, let the first instruction be loaded into the primary OEP and the second
loaded into the secondary OEP.
In the first and second examples, the result of the pOEP instruction is required as an input
to the sOEP.IEE. Since the pOEP instruction is not a simple MOVE operation, the test fails
in each case.
In the third example, the result of the pOEP operation is needed as an input to the
sOEP.IEE, but since the pOEP is executing the register-load MOVE instruction, the desti-
MOTOROLA
test6 = 1
if (sOEP.A > 15) /* indicates a valid register
/* if the sOEP.A equals the pOEP’s Execute_result, a conflict exists
if (sOEP.B > 15) /* indicates a valid register
/* if the sOEP.B equals the pOEP’s Execute_result, a conflict exists
1.
2.
the destination register Rx is required as either the sOEP.A or sOEP.B input, the
MC68060 bypasses the data as required and the test succeeds.
if ((sOEP.A = pOEP.Execute_result))
if ((sOEP.B = pOEP.Execute_result))
If the primary OEP instruction is a simple “move long to register” (MOVE.L,Rx) and
In the following sequence of instructions:
<op>.l,Dx
mov.l Dx,<mem>
asl.l &k,d0
add.l d0,d1
add.l <ea>,d1
sub.l d0,d1
mov.l <ea>,d0
add.l d0,d1
test6 = 0/* test6 has register conflict
test6 = 0/* test6 has register conflict
/* set test6 as okay
Execute_result = d0
A = d0
Execute_result = d1
B = d1
Execute_result = d0
A = d0
M68060 USER’S MANUAL
Instruction Execution Timing
10-9