IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 190

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
FIFO buffer, clear the interrupts and initiate a new HDLC search.
E1 RHDLC #1, #2, #3 Interrupt Control (049H, 0C9H, 149H, 1C9H, 249H, 2C9H, 349H, 3C9H)
E1-00AH).
INTE:
INTC[6:0]:
FIFO is empty. The set point is decimal 128 when the INTC[6:0] is all zeros.
Programming Information
Bit Name
Default
Bit No.
Type
If the EN is set from logic 1 to logic 0 and back to logic 1, the RHDLC will immediately terminate the reception of the current data frame, empty the
Selection of the RHDLC block (#1, #2, or #3) whose registers are visible on the microprocessor interface is done via the RHDLCSEL[1:0] (b7~6,
= 0: Disable the interrupt on the INT pin when there is a transition from ‘0’ to ‘1’ on the INTR (b0, E1-04AH).
= 1: Enable the interrupt on the INT pin when there is a transition from ‘0’ to ‘1’ on the INTR (b0, E1-04AH).
These bits set the interrupt threshold point of the FIFO buffer. Exceeding the set point will cause an interrupt, and the interrupt will persist until the
The contents of this register should only be changed when the EN (b0, E1-048H) is logic 0. This prevents any erroneous interrupt generation.
INTE
R/W
7
0
INTC[6]
R/W
6
0
INTC[5]
R/W
5
0
INTC[4]
R/W
4
0
180
INTC[3]
R/W
3
0
INTC[2]
R/W
2
0
T1 / E1 / J1 OCTAL FRAMER
INTC[1]
R/W
1
0
March 5, 2009
INTC[0]
R/W
0
0