IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 196

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
E1 THDLC #1, #2, #3 Interrupt Status / UDR Clear (054H, 0D4H, 154H, 1D4H, 254H, 2D4H, 354H, 3D4H)
E1-00AH).
FULL:
BLFILL:
FULLI:
OVRI:
UDRI:
LFILLI:
Programming Information
Bit Name
Default
Bit No.
Selection of the THDLC block (#1, #2, or #3) whose registers are visible on the microprocessor interface is done via the THDLCSEL[1:0] (b5~4,
= 0: The THDLC FIFO is not full.
= 1: The THDLC FIFO is full (128 bytes).
= 0: The fill level in the THDLC FIFO is not below the value of the LINT[6:0] (b6~0, E1-052H).
= 1: The fill level in the THDLC FIFO is empty or below the value of the LINT[6:0] (b6~0, E1-052H).
= 0: There is no transition (from ‘0’ to ‘1’) on the FULL.
= 1: There is a transition (from ‘0’ to ‘1’) on the FULL.
This bit is cleared to ‘0’ after the bit is read.
The Over-Written is that the THDLC FIFO was already full when another data byte was written to the THDLC Transmit Data register.
= 0: The THDLC FIFO is not overwritten.
= 1: The THDLC FIFO is overwritten.
This bit is cleared to ‘0’ after the bit is read.
The Under-Run is that the THDLC was in the process of transmitting a packet when it ran out of data to be transmitted.
= 0: The THDLC FIFO is not under-run.
= 1: The THDLC FIFO is under-run.
This bit is cleared to ‘0’ after the bit is read.
= 0: There is no transition (from ‘0’ to ‘1’) on the BLFILL.
= 1: There is a transition (from ‘0’ to ‘1’) on the BLFILL.
This bit is cleared to ‘0’ after the bit is read.
Type
Reserved
7
FULL
R
6
X
BLFILL
R
X
5
Reserved
4
186
FULLI
R
X
3
OVRI
R
2
X
T1 / E1 / J1 OCTAL FRAMER
UDRI
R
X
1
March 5, 2009
LFILLI
R
X
0