IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 278

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
6
ACCESS PORT
as described in the IEEE 1149.1 standards.
registers plus a Test Access Port (TAP) controller. Control of the TAP is
achieved through signals applied to the Test Mode Select (TMS) and
Test Clock (TCK) input pins. Data is shifted into the registers via the Test
IEEE STD 1149.1 JTAG Test Access Port
The IDT82V2108 supports the digital Boundary Scan Specification
The boundary scan architecture consists of data and instruction
IEEE STD 1149.1 JTAG TEST
TRST
TCK
TMS
TDI
(Test Access Port)
Controller
TAP
IDR (Device Identification Register)
BSR (Boundary Scan Register)
IR (Instruction Register)
BR (Bypass Register)
Figure 85. JTAG Architecture
Control<6:0>
268
Data Input (TDI) pin, and shifted out of the registers via the Test Data
Output (TDO) pin. Both TDI and TDO are clocked at a rate determined
by TCK.
Register), IDR (Device Identification Register), BR (Bypass Register)
and IR (Instruction Register). These will be described in the following
pages. Refer to Figure 85 for architecture.
The JTAG boundary scan registers includes BSR (Boundary Scan
Output Enable
Select
MUX
T1 / E1 / J1 OCTAL FRAMER
TDO
March 5, 2009