IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 4

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
Table of Contents
3.11 RECEIVE SYSTEM INTERFACE (RESI) ..................................................................................................................................................... 30
3.12 PRBS GENERATOR / DETECTOR (PRGD) ............................................................................................................................................... 55
3.13 TRANSMIT SYSTEM INTERFACE (TRSI) .................................................................................................................................................. 57
3.14 TRANSMIT PAYLOAD CONTROL (TPLC) ................................................................................................................................................. 78
3.15 FRAME GENERATOR (FRMG) ................................................................................................................................................................... 79
3.11.1 E1 Mode .......................................................................................................................................................................................... 30
3.11.2 T1/J1 Mode ...................................................................................................................................................................................... 44
3.12.1 E1 Mode .......................................................................................................................................................................................... 55
3.12.2 T1/J1 Mode ...................................................................................................................................................................................... 56
3.13.1 E1 Mode .......................................................................................................................................................................................... 57
3.13.2 T1/J1 Mode ...................................................................................................................................................................................... 69
3.14.1 E1 Mode .......................................................................................................................................................................................... 78
3.14.2 T1/J1 Mode ...................................................................................................................................................................................... 78
3.15.1 E1 Mode .......................................................................................................................................................................................... 79
3.11.1.1 Receive Clock Slave Mode .............................................................................................................................................. 30
3.11.1.2 Receive Clock Master Mode ............................................................................................................................................ 35
3.11.1.3 Receive Multiplexed Mode ............................................................................................................................................... 39
3.11.1.4 Parity Check & Polarity Fix ............................................................................................................................................... 41
3.11.1.5 Offset ................................................................................................................................................................................ 41
3.11.1.6 Output On RSDn/MRSD & RSSIGn/MRSSIG .................................................................................................................. 43
3.11.2.1 Receive Clock Slave Mode .............................................................................................................................................. 45
3.11.2.2 Receive Clock Master Mode ............................................................................................................................................ 50
3.11.2.3 Receive Multiplexed Mode ............................................................................................................................................... 52
3.11.2.4 Parity Check ..................................................................................................................................................................... 53
3.11.2.5 Offset ................................................................................................................................................................................ 53
3.11.2.6 Output On RSDn/MRSD & RSSIGn/MRSSIG .................................................................................................................. 54
3.12.1.1 Pattern Generator ............................................................................................................................................................. 55
3.12.1.2 Pattern Detector ............................................................................................................................................................... 55
3.12.2.1 Pattern Generator ............................................................................................................................................................. 56
3.12.2.2 Pattern Detector ............................................................................................................................................................... 56
3.13.1.1 Transmit Clock Slave Mode ............................................................................................................................................. 57
3.13.1.2 Transmit Clock Master Mode ............................................................................................................................................ 61
3.13.1.3 Transmit Multiplexed Mode .............................................................................................................................................. 63
3.13.1.4 Parity Check ..................................................................................................................................................................... 65
3.13.1.5 Offset ................................................................................................................................................................................ 65
3.13.2.1 Transmit Clock Slave Mode ............................................................................................................................................. 70
3.13.2.2 Transmit Clock Master Mode ............................................................................................................................................ 74
3.13.2.3 Transmit Multiplexed Mode .............................................................................................................................................. 75
3.13.2.4 Parity Check ..................................................................................................................................................................... 76
3.13.2.5 Offset ................................................................................................................................................................................ 76
3.15.1.1 Generation ........................................................................................................................................................................ 79
3.15.1.2 Alarm Indication ................................................................................................................................................................ 79
3.11.1.1.1 Receive Clock Slave RSCK Reference Mode ............................................................................................... 31
3.11.1.1.2 Receive Clock Slave External Signaling Mode .............................................................................................. 33
3.11.1.2.1 Receive Clock Master Full E1 Mode ............................................................................................................. 35
3.11.1.2.2 Receive Clock Master Fractional E1 (with F-bit) Mode ................................................................................. 37
3.11.2.1.1 Receive Clock Slave RSCK Reference Mode ............................................................................................... 45
3.11.2.1.2 Receive Clock Slave External Signaling Mode .............................................................................................. 47
3.11.2.2.1 Receive Clock Master Full T1/J1 Mode ......................................................................................................... 50
3.11.2.2.2 Receive Clock Master Fractional T1/J1 Mode ............................................................................................... 51
3.13.1.1.1 Transmit Clock Slave TSFS Enable Mode .................................................................................................... 58
3.13.1.1.2 Transmit Clock Slave External Signaling Mode ............................................................................................. 60
3.13.2.1.1 Transmit Clock Slave TSFS Enable Mode .................................................................................................... 70
3.13.2.1.2 Transmit Clock Slave External Signaling Mode ............................................................................................. 72
ii
T1 / E1 / J1 OCTAL FRAMER
March 5, 2009