IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 64

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
3.11.2.6
pins can be configured by the TRI[1:0] (b5~4, T1/J1-003H) of the corre-
sponding framer to be in high impedance state or to output the pro-
cessed data stream. However, in the Receive Multiplexed Mode, the
TRI[1:0] (b~4, T1/J1-003H) of the framers that are output to the same
multiplexed bus must be set to the same value.
Functional Description
In all the five modes, the RSDn/MRSD and the RSSIGn/MRSSIG
RSCFS
RSCCK
RSDn
RSDn
Output On RSDn/MRSD & RSSIGn/MRSSIG
The bit offset is 0:
The bit offset is set as: BOFF_EN (b3, T1/J1-078H) = 1, BOFF[2:0] (b2~0, T1/J1-078H) = 010; i.e. the CET = 6:
For example: when RSCFSFALL (b1, T1/J1-003H) = 1, RSCCKRISE (b0, T1/J1-003H) = 0
1
2
3
CH24
4
1
5
Figure 35. Receive Bit Offset in T1/J1 Mode
6
2
7
3
CH24
s t a r t i n g e d g e
(CET=0)
8
4
P
5
X
6
1 2 3
X
7
54
DUMMY
X
8
4 5
P
X
CET=6
X
X
X
X
F
X
DUMMY
1
X
2
X
CH1
3
X
T1 / E1 / J1 OCTAL FRAMER
4
F
1
2
CH1
3
March 5, 2009
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