ISP1582BS ST-Ericsson Inc, ISP1582BS Datasheet - Page 17

• Manufacturer Part Number: ISP1582BS
• Description: IC USB CTRL HI-SPEED 56HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1582BS

• Applications: USB Host/Peripheral Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Mounting Type: Surface Mount
• For Use With: ISP1582 PCI EVALKIT - PCI BUS EVAL KIT ISP1582
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
3. ISP1582/83 USB enumeration process
Table 11.
AN10039_4
Application note
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Data Port register: bit allocation
R/W
R/W
15
0
0
7
0
0
}
The initialization of the endpoint is done as shown in
RAM to be configured. Ensure that the total FIFO size of endpoints does not exceed
8 kB.
The USB enumeration process can be divided into three categories:
Besides these categories, there is also a stalling procedure for the endpoint
(see
The Endpoint Index register is used to reference the control endpoint and the set-up
endpoint. The set-up endpoint is 8 bytes in length. It is used to store the USB peripheral
request from the host. The firmware only needs to program the EP0SETUP bit of the
ISP1582/83 (see
Data from the set-up or control endpoint, indexed by the endpoint index is read from the
FIFO using the Data Port register; see
When writing to the endpoint, the Data Port register is also used for the data transfer to
the control IN endpoint. The control endpoint is controlled by the Control Function
register (see
using the CLBUF bit. The endpoint FIFO can be validated either by the Buffer Length
register or by the VENDP bit in the Control Function register. The Buffer Length register
(see
• Set-up token with the data IN stage; see
• Set-up token with the data OUT stage; see
• Set-up token with no data stage; see
Section
Table
R/W
R/W
14
0
0
6
0
0
}
13) reflects the amount of data in the OUT endpoint. As for the IN endpoint
3.4). Pay special attention when stalling the endpoint of the ISP1582/83.
Table
//enable FIFO
D14_Cntrl_Reg.D14_ENDPT_INDEX = 5;
D14_Cntrl_Reg.D14_ENDPT_TYPE.VALUE |= 0x0800;
Table
R/W
R/W
12) that allows the firmware to clear data in the OUT endpoint by
13
0
0
5
0
0
Rev. 04 — 21 December 2006
10) to reference the index to the set-up endpoint.
R/W
R/W
DATAPORT[15:8]
DATAPORT[7:0]
12
0
0
4
0
0
Table
Section 3.3
R/W
R/W
ISP1582/83 Firmware Programming Guide
Section 3.1
11
10.
0
0
3
0
0
Section 3.2
Fig 6
R/W
R/W
10
0
0
2
0
0
to allow the endpoint FIFO
R/W
R/W
AN10039
© NXP B.V. 2006. All rights reserved.
9
0
0
1
0
0
R/W
R/W
16 of 49
8
0
0
0
0
0