ISP1582BS ST-Ericsson Inc, ISP1582BS Datasheet - Page 46

• Manufacturer Part Number: ISP1582BS
• Description: IC USB CTRL HI-SPEED 56HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1582BS

• Applications: USB Host/Peripheral Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Mounting Type: Surface Mount
• For Use With: ISP1582 PCI EVALKIT - PCI BUS EVAL KIT ISP1582
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
AN10039_4
Application note
Fig 32. Handling PIO write
D
Issue the CPLD PIO Reset command
Initialize the Endpoint Index register
to the respective OUT endpoint
PIO_maxpacket_size = 512
PIO_Bytes_Remaining != 0
PIO_Bytes_Remaining = 0
PIO_Bytes_Remaining >
PIO_Bytes_Remaining =
Enable CPLD PIO mode
PIO_Bytes_remaining
PIO_MaxPaketSize
This_tranfer_size =
FileSize.Size
Is the device
register == 0
Buffer Staus
full-speed
Start
Yes
No
No
No
A
Yes
EP0SETUP OR
BUS_RESET
SUSP OR
Yes
PIO_maxpacket_size = 64
No
Yes
PIO_Bytes_remaining - =
No
B
Yes
PIO_MaxPacketSize
PIO_MaxPacketSize
This_tranfer_size =
Rev. 04 — 21 December 2006
from the variable to
and EP0SETUP are
which the Interrupt
Bits EP2Rx, SUSP
Reason register is
interrupt routine
BUS_RESET is
a flag which is
copied in the
BUS_RESET
interrupt
set on
Yes
This_buffer_remain - = 64
This_buffer_size = 64
Yes
ISP1582/83 Firmware Programming Guide
Read the Data Port register MSB to the internal RAM
Read the Data Port register LSB to the internal RAM
D
Yes
CPLD PIO Write LSB from the internal RAM
C
No
CPLD PIO Write MSB from the internal
This_buffer_remain > 64
This_buffer_remain = 0
Increment Count_PIO
Increment Count_PIO
This_buffer_remain =
Increment Count_PIO
Increment Count_PIO
This_buffer_remain
This_buffer_size =
This_buffer_remain
This_transfer_size
this_buffer_size
Count_PIO = 0
this_buffer_size
Count_PIO <
Count_PIO = 0
BUS_RESET
Count_PIO
SUSP OR
No
RAM
Yes
No
Stop
Yes
No
A
<
AN10039
© NXP B.V. 2006. All rights reserved.
No
B
C
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