ISP1582BS ST-Ericsson Inc, ISP1582BS Datasheet - Page 44

• Manufacturer Part Number: ISP1582BS
• Description: IC USB CTRL HI-SPEED 56HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1582BS

• Applications: USB Host/Peripheral Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Mounting Type: Surface Mount
• For Use With: ISP1582 PCI EVALKIT - PCI BUS EVAL KIT ISP1582
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
AN10039_4
Application note
Fig 30. Handling PIO or GDMA write
No
Initialize the Endpoint Index register to a value
Initialize the DMA Endpoint register to the
not equal to the DMA Endpoint register
Initialize the DMA transfer counter to
Reset the CPLD DMA controller
Stop the CPLD DMA controller
DMA_Test_Mode == MDMA
DMA_Test_Mode == GDMA
Set the CPLD DMA mode
controller for Slave Read
respective OUT endpoint
DMA_Test_Mode != PIO
Initialize the CPLD DMA
Is master mode
FileSize.Size
PIO_Write
Handle
mode
Stop
Start
Yes
No
No
No
DMA command register =
controller for Master Write mode
Initialize the CPLD DMA counter
MDMA_Write command
Reset internal variable
DMA_XFER_OK == 0
DMA_XFER_OK = 0
Yes
Initialize the CPLD DMA
INT_EOT == 0
INT_EOT = 0
Yes
to FileSize.SIze
AND
Rev. 04 — 21 December 2006
No
Yes
DMA command register =
GDMA_Write command
Write to the DMA command register with
DMA_REST; reinitialize the DMA
BUS_RESET ==1 OR
Yes
EP0SETUP ==1
SUSP ==1 OR
ISP1582/83 Firmware Programming Guide
Yes
Bits DMA_XFER_OK and INT_EOT
No
are from the variable to which the
DMA Interrupt Reason register is
copied in the interrupt routine
Bits SUSP and EP0SETUP are
copied in the interrupt routine
from the variable to which the
Interrupt reason register is
BUS_RESET is a flag
AN10039
© NXP B.V. 2006. All rights reserved.
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