ISP1582BS ST-Ericsson Inc, ISP1582BS Datasheet - Page 25

• Manufacturer Part Number: ISP1582BS
• Description: IC USB CTRL HI-SPEED 56HVQFN
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1582BS

• Applications: USB Host/Peripheral Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Mounting Type: Surface Mount
• For Use With: ISP1582 PCI EVALKIT - PCI BUS EVAL KIT ISP1582
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
4. DMA
AN10039_4
Application note
4.1 DMA reset
4.2 DMA start
4.3 DMA stop
4.4 DMA interrupt handling
The DMA reset command is used to reset the DMA core to the power-on reset state.
Issue the DMA reset command using the DMA command register.
To issue a DMA transfer:
The GDMA stop command is used to stop the GDMA transfer command and the MDMA
stop command is used to stop the MDMA transfer command. These commands are used
to abruptly stop a transfer.
To issue a DMA stop:
A DMA transfer will either be successfully completed or terminated. To identify the
interrupt source, the status in the Interrupt register and the DMA Interrupt Reason
register must be read during the interrupt service routine.
If bit DMA_XFER_OK in the DMA Interrupt Reason register is asserted, it means the
transfer counter has reached zero and the DMA transfer was successfully stopped.
If bit INT_EOT in the DMA Interrupt Reason register is set, it indicates that a short or
empty packet was received. That is, DMA transfer was terminated. Normally, for an OUT
transfer, it means that the remote host wishes to terminate the DMA transfer.
If bits DMA_XFER_OK and INT_EOT are simultaneously set, it means the transfer
counter reached zero and the last packet of the transfer is a short packet. Therefore, the
DMA transfer was successfully stopped.
If bit GDMA_STOP in the DMA Interrupt Reason register is set, it indicates the GDMA
transfer is abruptly stopped by the issue of the GDMA stop command in the DMA
command register.
1. Initialize the Endpoint Index register to a value not equal to the selected endpoint.
2. Initialize the DMA Endpoint register to the value of the selected endpoint buffer.
3. Assign the DMA transfer counter to the number of bytes to be transferred.
4. Write the required DMA command to the DMA Command register, depending on the
5. Assign to the Endpoint Index register a value not equal to the selected endpoint.
6. Initialize the DMA Endpoint register to the respective endpoint.
7. Issue the GDMA stop (for a GDMA transfer) or MDMA stop (for a MDMA transfer)
application.
command using the DMA Command register.
Rev. 04 — 21 December 2006
ISP1582/83 Firmware Programming Guide
AN10039
© NXP B.V. 2006. All rights reserved.
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