ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 100
ATtiny25 Automotive
Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATTINY25_AUTOMOTIVE.pdf
(7 pages)
3.ATTINY25_AUTOMOTIVE.pdf
(196 pages)
Specifications of ATtiny25 Automotive
Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATTINY25_AUTOMOTIVE PDF datasheet #2
- ATTINY25_AUTOMOTIVE PDF datasheet #3
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- Download datasheet (4Mb)
16.2.3
16.2.4
100
ATtiny25/45/85
SPI Slave Operation Example
Two-wire Mode
The following code demonstrates how to use the USI module as a SPI Slave:
The code is size optimized using only eight instructions (+ ret). The code example assumes that
the DO is configured as output and USCK pin is configured as input in the DDR Register. The
value stored in register r16 prior to the function is called is transferred to the master device, and
when the transfer is completed the data received from the Master is stored back into the r16
Register.
Note that the first two instructions is for initialization only and needs only to be executed
once.These instructions sets Three-wire mode and positive edge Shift Register clock. The loop
is repeated until the USI Counter Overflow Flag is set.
The USI Two-wire mode is compliant to the Inter IC (TWI) bus protocol, but without slew rate lim-
iting on outputs and input noise filtering. Pin names used by this mode are SCL and SDA.
init:
...
SlaveSPITransfer:
SlaveSPITransfer_loop:
ldi
sts
sts
ldi
sts
lds
sbrs
rjmp
lds
ret
r16,(1<<USIWM0)|(1<<USICS1)
USICR,r16
USIDR,r16
r16,(1<<USIOIF)
USISR,r16
r16, USISR
r16, USIOIF
SlaveSPITransfer_loop
r16,USIDR
7598H–AVR–07/09
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