ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 41

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ATtiny25 Automotive

Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATtiny25 Automotive

Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
8.9
7598H–AVR–07/09
Watchdog Timer
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
Table 8-4.
The Watchdog Timer is clocked from an On-chip Oscillator which runs at 128 kHz. By controlling
the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as shown in
8-7 on page
Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs. Ten different
clock cycle periods can be selected to determine the reset period. If the reset period expires
without another Watchdog Reset, the ATtiny25/45/85 resets and executes from the Reset Vec-
tor. For timing details on the Watchdog Reset, refer to
The Wathdog Timer can also be configured to generate an interrupt instead of a reset. This can
be very helpful when using the Watchdog to wake-up from Power-down.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out period,
two different safety levels are selected by the fuse WDTON as shown in Table 8-5. Refer to
“Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 44
details.
Table 8-5.
Figure 8-7.
WDTON
Unprogrammed
Programmed
Symbol
V
t
I
BG
BG
BG
Parameter
Bandgap reference voltage
Bandgap reference start-up time
Bandgap reference current
consumption
43. The WDR – Watchdog Reset – instruction resets the Watchdog Timer. The
Internal Voltage Reference Characteristics
WDT Configuration as a Function of the Fuse Settings of WDTON
Watchdog Timer
Safety
Level
1
2
WATCHDOG
OSCILLATOR
RESET
128 kHz
WDP0
WDP1
WDP2
WDP3
WDE
WDT Initial
State
Disabled
Enabled
V
CC
How to Disable the
WDT
Timed sequence
Always enabled
V
V
Condition
T
T
T
= 1.1V / 2.7V,
CC
CC
A
A
A
= 25°C
= 25°C
= 25°C
= 2.7V,
= 2.7V,
Table 8-7 on page
MCU RESET
PRESCALER
WATCHDOG
ATtiny25/45/85
Min
1.0
43.
How to Change
Time-out
No limitations
Timed sequence
Typ
1.1
40
15
Max
1.2
70
Units
µA
Table
µs
V
for
41

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