ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 81

• Manufacturer Part Number: ATtiny25 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny25 Automotive

• Flash (kbytes): 2 Kbytes
• Pin Count: 8
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 4
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 6
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

14. Counter and Compare Units
14.1
7598H–AVR–07/09
Timer/Counter1
Figure 14-1
nous clocking mode and an asynchronous clocking mode. The synchronous clocking mode uses
the system clock (CK) as the clock timebase and asynchronous mode uses the fast peripheral
clock (PCK) as the clock time base. The PCKE bit from the PLLCSR register enables the asyn-
chronous mode when it is set (‘1’).
Figure 14-1. Timer/Counter1 Prescaler
In the asynchronous clocking mode the clock selections are from PCK to PCK/16384 and stop,
and in the synchronous clocking mode the clock selections are from CK to CK/16384 and stop.
The clock options are described in
ister, TCCR1. Setting the PSR1 bit in GTCCR register resets the prescaler. The PCKE bit in the
PLLCSR register enables the asynchronous mode. The frequency of the fast peripheral clock is
64 MHz (or 32 MHz in Low Speed Mode).
The Timer/Counter1 general operation is described in the asynchronous mode and the opera-
tion in the synchronous mode is mentioned only if there are differences between these two
modes.
chronization delays in between registers. Note that all clock gating details are not shown in the
figure. The Timer/Counter1 register values go through the internal synchronization registers,
which cause the input synchronization delay, before affecting the counter operation. The regis-
ters TCCR1, GTCCR, OCR1A, OCR1B, and OCR1C can be read back right after writing the
register. The read back values are delayed for the Timer/Counter1 (TCNT1) register and flags
(OCF1A, OCF1B, and TOV1), because of the input and output synchronization.
The Timer/Counter1 features a high resolution and a high accuracy usage with the lower pres-
caling opportunities. It can also support two accurate, high speed, 8-bit Pulse Width Modulators
using clock speeds up to 64 MHz ( or 32 MHz in Low Speed Mode). In this mode,
Timer/Counter1 and the output compare registers serve as dual stand-alone PWMs with
non-overlapping non-inverted and inverted outputs. Refer to
on this function. Similarly, the high prescaling opportunities make this unit useful for lower speed
functions or exact timing functions with infrequent actions.
CK
PCKE
PCK 64/32 MHz
Figure 14-2
shows the Timer/Counter1 prescaler that supports two clocking modes, a synchro-
CS10
CS11
CS12
CS13
S
A
shows Timer/Counter 1 synchronization register block diagram and syn-
PSR1
T1CK
0
Table 14-2 on page 84
TIMER/COUNTER1 COUNT ENABLE
T/C PRESCALER
14-BIT
and the Timer/Counter1 Control Reg-
page 90
ATtiny25/45/85
for a detailed description
81