ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 33
ATtiny25 Automotive
Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATTINY25_AUTOMOTIVE.pdf
(7 pages)
3.ATTINY25_AUTOMOTIVE.pdf
(196 pages)
Specifications of ATtiny25 Automotive
Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATTINY25_AUTOMOTIVE PDF datasheet #2
- ATTINY25_AUTOMOTIVE PDF datasheet #3
- Current page: 33 of 196
- Download datasheet (4Mb)
7.5
7.6
7598H–AVR–07/09
Limitations
Power Reduction Register
Note that if a level triggered interrupt is used for wake-up from Power-down mode, the changed
level must be held for some time to wake up the MCU. Refer to
for details
Table 7-2.
Note:
BOD disable functionality has been implemented in the following devices, only:
The Power Reduction Register, PRR, provides a method to stop the clock to individualperipher-
als to reduce power consumption. The current state of the peripheral is frozenand the I/O
registers can not be read or written. Resources used by the peripheral when stopping the clock
will remain occupied, hence the peripheral should in most cases be disabled before stopping the
clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in the
same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. In all other sleep modes, the clock is already stopped.
• Bits 7, 6, 5, 4- Res: Reserved Bits
These bits are reserved bits in the ATtiny25/45/85 and will always read as zero.
• Bit 3- PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
Bit
Read/Write
Initial Value
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
• ATtiny25, revision D, and newer
• ATtiny45, revision D, and newer
• ATtiny85, revision C, and newer
1. For INT0, only level interrupt.
.
.
Active Clock Domains and Wake-up Sources in the Different Sleep Modes
R
7
–
0
Active Clock Domains
R
6
0
-
X
X
X
R
5
0
-
X
R
4
0
-
Oscillators
X
X
PRTIM1
R/W
3
0
X
X
PRTIM0
X
(1)
(1)
R/W
2
0
“External Interrupts” on page 58
ATtiny25/45/85
Wake-up Sources
X
X
PRUSI
R/W
1
0
X
X
X
PRADC
R/W
0
0
X
X
X
PRR
X
X
X
33
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