ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 61

• Manufacturer Part Number: ATtiny25 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny25 Automotive

• Flash (kbytes): 2 Kbytes
• Pin Count: 8
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 4
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 6
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12. 8-bit Timer/Counter0 with PWM
12.1
12.1.1
7598H–AVR–07/09
Overview
Registers
Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Output
Compare Units, and with PWM support. It allows accurate program execution timing (event man-
agement) and wave generation. The main features are:
•
•
•
•
•
•
•
A simplified block diagram of the 8-bit Timer/Counter is shown in
placement of I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
Figure 12-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B)
“8-bit Timer/Counter Register Description” on page
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
“Pinout ATtiny25/45/85” on page
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Value
BOTTOM
Fixed
TOP
clk
=
Tn
0
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Waveform
Waveform
( From Prescaler )
Detector
2. CPU accessible I/O Registers,
Edge
ATtiny25/45/85
Figure
72.
12-1. For the actual
OCnA
OCnB
Tn
T0
).
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