ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 43

• Manufacturer Part Number: ATtiny25 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny25 Automotive

• Flash (kbytes): 2 Kbytes
• Pin Count: 8
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 4
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 6
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

7598H–AVR–07/09
In safety level 1, WDE is overridden by WDRF in MCUSR. See
MCUSR” on page 40
is set. To clear WDE, WDRF must be cleared before disabling the Watchdog with the procedure
described above. This feature ensures multiple resets during conditions causing failure, and a
safe start-up after the failure.
Note:
• Bits 5, 2..0 – WDP3..0: Watchdog Timer Prescaler 3, 2, 1, and 0
The WDP3..0 bits determine the Watchdog Timer prescaling when the Watchdog Timer is
enabled. The different prescaling values and their corresponding Timeout Periods are shown in
Table
Table 8-7.
Note:
WDP3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
8-7.
If the watchdog timer is not going to be used in the application, it is important to go through a
watchdog disable procedure in the initialization of the device. If the Watchdog is accidentally
enabled, for example by a runaway pointer or brown-out condition, the device will be reset, which
in turn will lead to a new watchdog reset. To avoid this situation, the application software should
always clear the WDRF flag and the WDE control bit in the initialization routine.
1. If selected, one of the valid settings below 0b1010 will be used.
WDP2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Watchdog Timer Prescale Select
WDP1
for description of WDRF. This means that WDE is always set when WDRF
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
WDP0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Number of WDT Oscillator
1024K cycles
128K cycles
256K cycles
512K cycles
16K cycles
32K cycles
64K cycles
2K cycles
4K cycles
8K cycles
Cycles
Reserved
ATtiny25/45/85
“MCU Status Register –
(1)
Typical Time-out at
V
CC
0.125 s
16 ms
32 ms
64 ms
0.25 s
0.5 s
1.0 s
2.0 s
4.0 s
8.0 s
= 5.0V
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