AD7194 Analog Devices, AD7194 Datasheet - Page 18

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AD7194

Manufacturer Part Number
AD7194
Description
8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
Manufacturer
Analog Devices
Datasheet

Specifications of AD7194

Resolution (bits)
24bit
# Chan
8
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(2Vref/PGA Gain) p-p
Adc Architecture
Sigma-Delta
Pkg Type
CSP

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
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AD7194
ON-CHIP REGISTERS
The ADC is controlled and configured via a number of on-chip registers that are described on the following pages wherein the term, set,
implies a Logic 1 state and cleared implies a Logic 0 state, unless otherwise noted.
Table 15. Register Summary
Register
Communications
Status
Mode
Configuration
Data
ID
GPOCON
Offset
Full Scale
02
03
Addr.
00
00
01
04
05
06
07
Dir.
W
R
R/W
R/W
R
R
R/W
R/W
R/W
Default
00
80
080060
000117
000000
X3
00
800000
5XXXX0
Bit 7
0
RDY
SINC3
FS7
Chop (MSB)
CH7(
Burn
D23 (MSB)
D15
D7
X
0
OF23 (MSB)
OF15
OF7
FS23 (MSB)
FS15
FS7
Mode select
Rev. 0 | Page 18 of 56
Bit 6
R/W
ERR
0
FS6
REFDET
D22
D14
D6
X
0
OF22
FS14
FS6
0
CH6
OF14
OF6
FS22
Bit 5
NOREF
ENPAR
FS5
CH5
0
D21
D13
D5
X
GP32EN
OF21
OF13
OF5
FS13
FS5
0
FS21
Register address
Bit 4
Parity
DAT_STA
CLK_DIV
FS4
REFSEL
CH4
BUF
D20
D12
D4
X
GP10EN
OF20
OF12
OF4
FS20
FS12
FS4
Bit 3
CHD3
CLK1
Single
FS3
0
CH3
U/B
D19
D11
D3
0
P3DAT
OF19
OF11
OF3
FS19
FS11
FS3
Bit 2
CREAD
CHD2
CLK0
REJ60
FS2
Pseudo
CH2
G2
D18
D10
D2
0
P2DAT
OF18
OF10
OF2
FS18
FS10
FS2
Bit 1
0
CHD1
AVG1
FS9
FS1
0
CH1
G1
D17
D9
D1
1
P1DAT
OF17
OF9
OF1
FS17
FS9
FS1
Bit 0
CHD0
D0 (LSB)
P0DAT
0
AVG0
FS8
FS0 (LSB)
TEMP
CH0
G0 (LSB)
D16
D8
1
OF16
OF8
OF0 (LSB)
FS16
FS8
FS0 (LSB)

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