AD7194 Analog Devices, AD7194 Datasheet - Page 4

• Manufacturer Part Number: AD7194
• Description: 8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
• Manufacturer: Analog Devices

Specifications of AD7194

• Resolution (bits): 24bit
• # Chan: 8
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

AD7194
Parameter
ANALOG INPUTS
Normal Mode Rejection
Differential Input
Absolute AIN Voltage
Analog Input Current
Sinc
Sinc
Fast Settling
Voltage Ranges
Limits
Unbuffered Mode
Buffered Mode
Buffered Mode
Unbuffered Mode
Internal Clock
External Clock
Internal Clock
External Clock
Internal Clock
External Clock
Input Current
Input Current Drift
Input Current
Input Current Drift
4
3
Filter
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
Filter
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
@ 50 Hz, 60 Hz
@ 50 Hz
@ 50 Hz
@ 60 Hz
@ 50 Hz
@ 60 Hz
@ 50 Hz
@ 60 Hz
2
2
2
Min
100
74
96
97
120
82
120
120
75
60
70
70
100
67
95
95
26
26
40
40
−(AV
AGND − 0.05
AGND + 0.25
−2
−3
DD
− 1.25 V)/gain
Typ
±V
±5
±3.5
±1
±0.05
±1.6
REF
/gain
Rev. 0 | Page 4 of 56
Max
+(AV
AV
AV
+2
+3
DD
DD
DD
+ 0.05
− 0.25
− 1.25 V)/gain
Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
V
V
V
V
nA
nA
pA/°C
μA/V
μA/V
nA/V/°C
nA/V/°C
Test Conditions/Comments
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
50 Hz output data rate, REJ60
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
50 Hz output data rate, 50 Hz ± 1 Hz
60 Hz output data rate, 60 Hz ± 1 Hz
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
50 Hz output data rate, REJ60
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
50 Hz output data rate, 50 Hz ± 1 Hz
60 Hz output data rate, 60 Hz ± 1 Hz
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
50 Hz output data rate, REJ60
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
50 Hz output data rate, 50 Hz ± 1 Hz
60 Hz output data rate, 60 Hz ± 1 Hz
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
50 Hz output data rate, REJ60
50 Hz ± 1 Hz, 60 Hz ± 1 Hz
50 Hz output data rate, 50 Hz ± 1 Hz
60 Hz output data rate, 60 Hz ± 1 Hz
FS[9:0]
FS[9:0]
FS[9:0]
FS[9:0]
VREF = REFINx(+) − REFINx(−),
gain = 1 to 128
Gain > 1
Gain = 1
Gain > 1
Gain = 1, input current varies with input
voltage
Gain > 1
External clock
Internal clock
3
3
3
3
= 6, average by 16, 50 Hz ± 0.5 Hz
= 5, average by 16, 60 Hz ± 0.5 Hz
= 6, average by 16, 50 Hz ± 0.5 Hz
= 5, average by 16, 60 Hz ± 0.5 Hz
1
6
6
6
6
= 1,
= 1,
= 1,
= 1,