The LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz

LPC1759FBD80

Manufacturer Part NumberLPC1759FBD80
DescriptionThe LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
ManufacturerNXP Semiconductors
LPC1759FBD80 datasheet
 


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NXP Semiconductors
11.9 SPI
Table 16.
T
=
amb
Symbol
T
cy(PCLK)
T
SPICYC
t
SPICLKH
t
SPICLKL
SPI master
t
SPIDSU
t
SPIDH
t
SPIQV
t
SPIOH
SPI slave
t
SPIDSU
t
SPIDH
t
SPIQV
t
SPIOH
[1]
T
SPICYC
processor clock CCLK.
[2]
Timing parameters are measured with respect to the 50 % edge of the clock PCLK and the 10 % (90 %)
edge of the data signal (MOSI or MISO).
Fig 21. SPI master timing (CPHA = 1)
LPC1759_58_56_54_52_51
Product data sheet
Dynamic characteristics of SPI pins
40
C to +85
C.
Parameter
PCLK cycle time
SPI cycle time
SPICLK HIGH time
SPICLK LOW time
SPI data set-up time
SPI data hold time
SPI data output valid time
SPI output data hold time
SPI data set-up time
SPI data hold time
SPI data output valid time
SPI output data hold time
 n)  0.5 %, n is the SPI clock divider value (n  8); PCLK is derived from the
= (T
cy(PCLK)
SCK (CPOL = 0)
SCK (CPOL = 1)
MOSI
MISO
DATA VALID
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 March 2011
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
Min
Typ
Max
10
-
-
[1]
79.6
-
-
0.485
T
-
-
SPICYC
-
0.515
[2]
0
-
-

 5
[2]
2
T
-
-
cy(PCLK)

[2]
2
T
+ 30
-
-
cy(PCLK)

[2]
2
T
+ 5
-
-
cy(PCLK)
[2]
0
-
-

[2]
2
T
+ 5
-
-
cy(PCLK)

[2]
2
T
+ 35
-
-
cy(PCLK)

[2]
2
T
+ 15
-
-
cy(PCLK)
T
t
t
SPICYC
SPICLKH
SPICLKL
t
SPIQV
DATA VALID
DATA VALID
t
t
SPIDSU
SPIDH
DATA VALID
Unit
ns
ns
ns
T
ns
SPICYC
ns
ns
ns
ns
ns
ns
ns
ns
t
SPIOH
002aad986
© NXP B.V. 2011. All rights reserved.
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