The LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz

LPC1759FBD80

Manufacturer Part NumberLPC1759FBD80
DescriptionThe LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
ManufacturerNXP Semiconductors
LPC1759FBD80 datasheet
 


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Page 6/74

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NXP Semiconductors
6. Pinning information
6.1 Pinning
Fig 2.
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Type
P0[0] to P0[31]
I/O
[1]
P0[0]/RD1/TXD3/
37
I/O
SDA1
I
O
I/O
[1]
P0[1]/TD1/RXD3/
38
I/O
SCL1
O
I
I/O
[2]
P0[2]/TXD0/AD0[7] 79
I/O
O
I
[2]
P0[3]/RXD0/AD0[6] 80
I/O
I
I
[1]
P0[6]/
64
I/O
I2SRX_SDA/
I/O
SSEL1/MAT2[0]
I/O
O
LPC1759_58_56_54_52_51
Product data sheet
LPC1759/58/56/54/52/51
1
20
Pin configuration LQFP80 package
Description
Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit. The
operation of Port 0 pins depends upon the pin function selected via the pin
connect block. Some port pins are not available on the LQFP80 package.
P0[0] — General purpose digital input/output pin.
RD1 — CAN1 receiver input.
TXD3 — Transmitter output for UART3.
2
SDA1 — I
C1 data input/output (this is not an I
P0[1] — General purpose digital input/output pin.
TD1 — CAN1 transmitter output.
RXD3 — Receiver input for UART3.
2
SCL1 — I
C1 clock input/output (this is not an I
P0[2] — General purpose digital input/output pin.
TXD0 — Transmitter output for UART0.
AD0[7] — A/D converter 0, input 7.
P0[3] — General purpose digital input/output pin.
RXD0 — Receiver input for UART0.
AD0[6] — A/D converter 0, input 6.
P0[6] — General purpose digital input/output pin.
I2SRX_SDA — Receive data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I
(LPC1759/58/56 only).
SSEL1 — Slave Select for SSP1.
MAT2[0] — Match output for Timer 2, channel 0.
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 March 2011
32-bit ARM Cortex-M3 microcontroller
60
41
002aae158
2
C-bus compliant open-drain pin).
2
C-bus compliant open-drain pin).
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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