ST7LIT15BF0 STMicroelectronics, ST7LIT15BF0 Datasheet - Page 121

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ST7LIT15BF0

Manufacturer Part Number
ST7LIT15BF0
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LIT15BF0

Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
13.4 SUPPLY CURRENT CHARACTERISTICS
The following current consumption specified for
the ST7 functional operating modes over tempera-
ture range does not take into account the clock
source current consumption. To get the total de-
13.4.1 Supply Current
T
Notes:
1. CPU running with memory access, all I/O pins in input mode with a static value at V
in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2. All I/O pins in input mode with a static value at V
driven by external square wave, LVD disabled.
3. SLOW mode selected with f
V
4. SLOW-WAIT mode selected with f
V
5. All I/O pins in output mode with a static value at V
tested in production at V
6. All I/O pins in input mode with a static value at V
max.
7. This consumption refers to the Halt period only and not the associated run period which is software dependent.
Figure 71. Typical I
Symbol
Note: Graph displays data beyond the normal operating range of 3V - 5.5V
SS
DD
A
I
DD
= -40 to +85°C unless otherwise specified
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
or V
9
8
7
6
5
4
3
2
1
0
2
SS
Supply current in RUN mode
Supply current in WAIT mode
Supply current in SLOW mode
Supply current in SLOW WAIT mode7
Supply current in HALT mode
Supply current in AWUFH mode
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2.5
.5
1
2
4
6
8
3
3.5
DD
Parameter
DD
in RUN vs. f
4
max and f
Vdd (V)
CPU
4.5
based on f
5
CPU
CPU
5)
5.5
CPU
based on f
max.
6)7)
OSC
6
divided by 32. All I/O pins in input mode with a static value at V
6.5
DD
DD
SS
OSC
or V
or V
(no load), LVD disabled. Data based on characterization results,
divided by 32. All I/O pins in input mode with a static value at
f
f
f
f
-40°C≤T
-40°C≤T
SS
CPU
CPU
CPU
CPU
SS
(no load), all peripherals in reset state; clock input (CLKIN)
(no load). Data tested in production at V
vice consumption, the two current values must be
added (except for HALT mode for which the clock
is stopped).
Figure 72. Typical I
=8MHz
=8MHz
=250kHz
=250kHz
Note: Graph displays data beyond the normal operating range of 3V - 5.5V
Note: Graph displays data beyond the normal operating range of 3V - 5.5V
9
8
7
6
5
4
3
2
1
0
Conditions
2
A
A
≤+125°C
≤+125°C
1)
2)
2.5
3)
4)
3
3.5
DD
DD
or V
4
in RUN at f
Vdd (V)
SS
7
3
0.7
0.5
<1
20
4.5
Typ
(no load), all peripherals
5
DD
ST7LITE1xB
9
3.6
0.9
0.8
6
CPU
Max
max. and f
5.5
= 8MHz
140°C
90°C
25°C
-5°C
-45°C
6
121/159
Unit
mA
μA
DD
CPU
6.5
or

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