ST7LIT15BF0 STMicroelectronics, ST7LIT15BF0 Datasheet - Page 65

• Manufacturer Part Number: ST7LIT15BF0
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LIT15BF0

• Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow

DUAL 12-BIT AUTORELOAD TIMER 4 (Cont’d)
■
Pulses that last more than 8μs can be measured
with an accuracy of 4μs if f
lowing conditions:
– The 12-bit AT4 Timer is clocked by the Lite Timer
– The ICS bit in the ATCSR2 register is set so that
Figure 45. Long Range Input Capture Block Diagram
Notes:
1. Since the input capture flags (ICF) for both tim-
ers (AT4 Timer and LT Timer) are set when signal
transition occurs, software must mask one inter-
rupt by clearing the corresponding ICIE bit before
setting the ICS bit.
2. If the ICS bit changes (from 0 to 1 or from 1 to
0), a spurious transition might occur on the input
capture signal because of different values on LTIC
and ATIC. To avoid this situation, it is recommend-
ed to do as follows:
– First, reset both ICIE bits.
– Then set the ICS bit.
– Reset both ICF bits.
ATIC
LTIC
(RTC pulse: CK[1:0] = 01 in the ATCSR register)
the LTIC pin is used to trigger the AT4 Timer cap-
ture.
Long Input Capture
ICS
1
0
f
LTIMER
32MHz
OFF
f
cpu
f
OSC/32
OSC
LTICR
= 8 MHz in the fol-
CNTR1
ATR1
ATICR
12-bit Input Capture Register
8-bit Input Capture Register
12-bit AutoReload Register
8-bit Timebase Counter1
12-bit Upcounter1
– The signal to be captured is connected to LTIC
– Input Capture registers LTICR, ATICRH and
This configuration allows to cascade the Lite Timer
and the 12-bit AT4 Timer to get a 20-bit input cap-
ture value. Refer to
– And then set the ICIE bit of desired interrupt.
3. How to compute a pulse length with long input
capture feature.
As both timers are used, computing a pulse length
is not straight-forward. The procedure is as fol-
lows:
– At the first input capture on the rising edge of the
Refer to
pin
ATICRL are read
pulse, we assume that values in the registers are
as follows:
LTICR = LT1
ATICRH = ATH1
ATICRL = ATL1
Hence ATICR1 [11:0] = ATH1 & ATL1
12-Bit ARTIMER
LITE TIMER
Figure
12.
Figure
8 LSB bits
12 MSB bits
11.
ST7LITE1xB
20
cascaded
bits
65/159
1