ST7LIT15BF0 STMicroelectronics, ST7LIT15BF0 Datasheet - Page 62

• Manufacturer Part Number: ST7LIT15BF0
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LIT15BF0

• Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow

ST7LITE1xB
DUAL 12-BIT AUTORELOAD TIMER 4 (Cont’d)
11.2.3.3 Break Function
The break function can be used to perform an
emergency shutdown of the application being driv-
en by the PWM signals.
The break function is activated by the external
BREAK pin or internal comparator output. This can
be selected by using the BRSEL bit in BREAKCR
Register. In order to use the break function it must
be previously enabled by software setting the
BPEN bit in the BREAKCR register.
The Break active level can be programmed by the
BREDGE bit in the BREAKCR register. When an
active level is detected on the BREAK pin, the BA
bit is set and the break function is activated. In this
case, the PWM signals are forced to BREAK value
if respective OEx bit is set in PWMCR register.
Software can set the BA bit to activate the break
function without using the BREAK pin. The BREN1
and BREN2 bits in the BREAKEN Register are
used to enable the break activation on the 2
Figure 41. Block Diagram of Break Function
62/159
1
BREAK pin
Comparator
BREAKEN Register
BREN2
BRSEL
BREN1
Level
Selection
BREDGE
BA
BREAKCR Register
BPEN
ENCNTR2 bit
PWM3
BREAKCR Register
counters respectively. In Dual Timer Mode, the
break for PWM2 and PWM3 is enabled by the
BREN2 bit. In Single Timer Mode, the BREN1 bit
enables the break for all PWM channels.
When a break function is activated (BA bit =1 and
BREN1/BREN2 =1):
– The break pattern (PWM[3:0] bits in the BREAK-
– The 12-bit PWM counter CNTR1 is put to its re-
– The 12-bit PWM counter CNTR2 is put to its re-
– ATR1, ATR2, Preload and Active DCRx are put
– Counters stop counting.
When the break function is deactivated after ap-
plying the break (BA bit goes from 1 to 0 by soft-
ware), Timer takes the control of PWM ports.
CR) is forced directly on the PWMx output pins if
respective OEx is set. (after the inverter).
set value, i.e. 00h (if BREN1 = 1).
set value,i.e. 00h (if BREN2 = 1).
to their reset values.
PWM2
PWM0/1 Break Enable
PWM2/3 Break Enable
PWM3
PWM2
PWM0
PWM1
PWM1
PWM0
(Inverters)
OEx
PWM0
PWM1
PWM2
PWM3