ST7LIT15BF0 STMicroelectronics, ST7LIT15BF0 Datasheet - Page 22

• Manufacturer Part Number: ST7LIT15BF0
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LIT15BF0

• Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow

ST7LITE1xB
CPU REGISTERS (Cont’d)
STACK POINTER (SP)
Read/Write
Reset Value: 01FFh
The Stack Pointer is a 16-bit register which is al-
ways pointing to the next free location in the stack.
It is then decremented after data has been pushed
onto the stack and incremented before data is
popped from the stack (see
Since the stack is 128 bytes deep, the 9 most sig-
nificant bits are forced by hardware. Following an
MCU Reset, or after a Reset Stack Pointer instruc-
tion (RSP), the Stack Pointer contains its reset val-
ue (the SP6 to SP0 bits are set) which is the stack
higher address.
The least significant byte of the Stack Pointer
(called S) can be directly accessed by a LD in-
struction.
Figure 12. Stack Manipulation Example
22/159
1
@ 0180h
@ 01FFh
15
0
7
1
SP
SP6
0
Subroutine
Stack Higher Address = 01FFh
Stack Lower Address = 0180h
CALL
PCH
PCL
SP5
0
SP
SP4
0
SP3
Interrupt
0
Event
Figure
PCH
PCH
PCL
PCL
CC
A
X
SP2
0
12).
SP
SP1
0
PUSH Y
SP0
PCH
PCH
PCL
PCL
8
1
0
CC
Y
A
X
SP
Note: When the lower limit is exceeded, the Stack
Pointer wraps around to the stack upper limit, with-
out indicating the stack overflow. The previously
stored information is then overwritten and there-
fore lost. The stack also wraps in case of an under-
flow.
The stack is used to save the return address dur-
ing a subroutine call and the CPU context during
an interrupt. The user may also directly manipulate
the stack by means of the PUSH and POP instruc-
tions. In the case of an interrupt, the PCL is stored
at the first location pointed to by the SP. Then the
other registers are stored in the next locations as
shown in
– When an interrupt is received, the SP is decre-
– On return from interrupt, the SP is incremented
A subroutine call occupies two locations and an in-
terrupt five locations in the stack area.
mented and the context is pushed on the stack.
and the context is popped from the stack.
POP Y
PCH
PCH
PCL
PCL
CC
Figure
A
X
SP
12.
IRET
PCH
PCL
SP
or RSP
RET