ST7LIT15BF0 STMicroelectronics, ST7LIT15BF0 Datasheet - Page 128

• Manufacturer Part Number: ST7LIT15BF0
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LIT15BF0

• Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow

ST7LITE1xB
EMC CHARACTERISTICS (Cont’d)
13.7.3 Absolute Maximum Ratings (Electrical
Sensitivity)
Based on two different tests (ESD and LU) using
specific measurement methods, the product is
stressed in order to determine its performance in
terms of electrical sensitivity. For more details, re-
fer to the application note AN1181.
Absolute Maximum Ratings
Note:
1. Data based on characterization results, not tested in production.
13.7.3.2 Static Latch-Up
■
Electrical Sensitivities
128/159
V
V
LU: 3 complementary static tests are required
on 6 parts to assess the latch-up performance.
A supply overvoltage (applied to each power
supply pin) and a current injection (applied to
Symbol
Symbol
ESD(HBM)
ESD(MM)
LU
Electro-static discharge voltage
(Human Body Model)
Electro-static discharge voltage
(Machine Model)
Static latch-up class
Parameter
Ratings
T
T
T
T
A
A
A
A
=+25°C
=+25°C
=+25°C
=+85°C
13.7.3.1 Electro-Static Discharge (ESD)
Electro-Static Discharges (a positive then a nega-
tive pulse separated by 1 second) are applied to
the pins of each sample according to each pin
combination. The sample size depends on the
number of supply pins in the device (3 parts*(n+1)
supply pin). Two models can be simulated: Human
Body Model and Machine Model. This test con-
forms to the JESD22-A114A/A115A standard.
each input, output and configurable I/O pin) are
performed on each sample. This test conforms
to the EIA/JESD 78 IC latch-up standard. For
more details, refer to the application note
AN1181.
Conditions
Conditions
Maximum value
8000
400
Class
A
A
1)
Unit
V