ST7LIT15BF0 STMicroelectronics, ST7LIT15BF0 Datasheet - Page 129

• Manufacturer Part Number: ST7LIT15BF0
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LIT15BF0

• Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• 128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow

13.8 I/O PORT PIN CHARACTERISTICS
13.8.1 General Characteristics
Subject to general operating conditions for V
Notes:
1. Data based on validation/design results.
2. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see
based on design simulation and technology characteristics, not tested in production. This value depends on V
perature values.
3. The R
4. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Figure 80. Two typical Applications with unused I/O Pin
Symbol
t
t
t
r(IO)out
f(IO)out
w(IT)in
V
R
C
V
V
I
I
hys
PU
S
IH
L
IO
IL
(external pull-up of 10k mandatory in
Caution: During normal operation the ICCCLK pin must be pulled-up, internally or externally
Note: I/O can be left unconnected if it is configured as output (0 or 1) by the software. This has the advantage of greater EMC
robustness and lower cost.
PU
pull-up equivalent resistor is based on a resistive transistor.
Input low level voltage
Input high level voltage
Schmitt trigger voltage
hysteresis
Input leakage current
Static current consumption in-
duced by each floating input
pin
Weak pull-up equivalent
resistor
I/O pin capacitance
Output high to low level fall
time
Output low to high level rise
time
External interrupt pulse time
2)
1)
1)
3)
Parameter
V
1)
DD
10kΩ
UNUSED I/O PORT
noisy environment).
4)
ST7XXX
V
Floating input mode
V
C
Between 10% and 90%
SS
IN
L
=50pF
=
≤
V
V
SS
IN
DD
≤
V
, f
V
V
Conditions
DD
DD
DD
OSC
This is to avoid entering ICC mode unexpectedly during a reset.
Figure
=5V
=3V
, and T
80). Static peak current value taken at a fixed V
A
unless otherwise specified.
10kΩ
V
0.7xV
SS
Min
UNUSED I/O PORT
50
1
- 0.3
DD
ST7XXX
Typ
400
400
120
160
25
25
5
V
0.3xV
DD
ST7LITE1xB
Max
250
±1
+ 0.3
DD
DD
and tem-
IN
129/159
Unit
t
mV
CPU
value,
μA
kΩ
pF
ns
V