BC41B143A-ANN-E4 ETC, BC41B143A-ANN-E4 Datasheet - Page 18

• Manufacturer Part Number: BC41B143A-ANN-E4
• Description: Bluecore 4-rom CSP EDR Single Chip Bluetooth v2.0 + EDR System
• Manufacturer: ETC

Notes:
BC41B143A-ds-002Pd
Input/Output Terminal Characteristics (Continued)
Crystal Oscillator
Crystal frequency
Digital trim range
Trim step size
Transconductance
Negative resistance
External Clock
Input frequency
Clock input level
Allowable jitter
XTAL_IN input impedance
XTAL_IN input capacitance
VDD_CORE, VDD_RADIO, VDD_LO and VDD_ANA are at 1.8V unless shown otherwise.
VDD_PADS, VDD_PIO and VDD_USB are at 3.0V unless shown otherwise.
The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT.
Current drawn into a pin is defined as positive; current supplied out of a pin is defined as negative.
(1)
(2)
(3)
(4)
(5)
Integer multiple of 250kHz.
The difference between the internal capacitance at minimum and maximum settings of the internal
digital trim.
XTAL frequency = 16MHz; XTAL C0 = 0.75pF; XTAL load capacitance = 8.5pF.
Clock input can be any frequency between 8 and 40MHz in steps of 250kHz and also covers the
CDMA/3G TCXO frequencies of 7.68, 14.44, 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz.
Clock input can either be sinusoidal or square wave. If the peaks of the signal are below VSS_ANA or
above VDD_ANA a DC blocking capacitor is required between the signal and XTAL_IN.
(2)
(4)
(5)
(2)
(1)
(3)
This material is subject to CSR’s non-disclosure agreement
© Cambridge Silicon Radio Limited 2005
Production Information
Minimum
870
8.0
5.0
2.0
8.0
0.4
-
-
-
-
Typical
1500
≥10
6.2
0.1
≤4
-
-
-
-
-
Maximum
VDD_ANA
Electrical Characteristics
2400
40.0
40.0
8.0
15
-
-
-
-
Page 18 of 89
V pk-pk
ps rms
Unit
MHz
MHz
mS
kΩ
pF
pF
pF
Ω