BC41B143A-ANN-E4 ETC, BC41B143A-ANN-E4 Datasheet - Page 70
BC41B143A-ANN-E4
Manufacturer Part Number
BC41B143A-ANN-E4
Description
Bluecore 4-rom CSP EDR Single Chip Bluetooth v2.0 + EDR System
Manufacturer
ETC
Datasheet
1.BC41B143A-ANN-E4.pdf
(89 pages)
- Current page: 70 of 89
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As with Long Frame Sync, BlueCore4-ROM CSP samples PCM_IN on the falling edge of PCM_CLK and
transmits PCM_OUT on the rising edge. PCM_OUT can be configured to be high impedance on the falling edge
of PCM_CLK in the LSB position or on the rising edge.
11.7.4 Multi Slot Operation
More than one SCO connection over the PCM interface is supported using multiple slots. Up to three SCO
connections can be carried over any of the first four slots.
11.7.5 GCI Interface
BlueCore4-ROM CSP is compatible with the General Circuit Interface, a standard synchronous 2B+D ISDN
timing interface. The two 64Kbits/s B channels can be accessed when this mode is configured.
The start of frame is indicated by the rising edge of PCM_SYNC and runs at 8kHz. With BlueCore4-ROM CSP in
Slave mode, the frequency of PCM_CLK can be up to 4.096MHz.
BC41B143A-ds-002Pd
SHORT_PCM_SYNC
LONG_PCM_SYNC
PCM_SYNC
PCM_OUT
PCM_CLK
PCM_IN
Figure 11.21: Multi Slot Operation with Two Slots and 8-bit Companded Samples
PCM_OUT
PCM_CLK
PCM_IN
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This material is subject to CSR’s non-disclosure agreement
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B1 Channel
© Cambridge Silicon Radio Limited 2005
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Figure 11.22: GCI Interface
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Production Information
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B2 Channel
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Device Terminal Descriptions
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Page 70 of 89
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