BC41B143A-ANN-E4 ETC, BC41B143A-ANN-E4 Datasheet - Page 55

• Manufacturer Part Number: BC41B143A-ANN-E4
• Description: Bluecore 4-rom CSP EDR Single Chip Bluetooth v2.0 + EDR System
• Manufacturer: ETC

Figure 11.6 shows an electrical equivalent circuit for a crystal. The crystal appears inductive near its resonant
frequency. It forms a resonant circuit with its load capacitors.
The resonant frequency can be trimmed with the crystal load capacitance. BlueCore4-ROM CSP contains
variable internal capacitors to provide a fine trim.
Frequency
Initial Tolerance
Pullability
The BlueCore4-ROM CSP driver circuit is a transconductance amplifier. A voltage at XTAL_IN generates a
current at XTAL_OUT. The value of transconductance is variable and may be set for optimum performance.
11.3.2 Load Capacitance
For resonance at the correct frequency the crystal should be loaded with its specified load capacitance, which is
defined for the crystal. This is the total capacitance across the crystal viewed from its terminals. BlueCore4-ROM
CSP provides some of this load with the capacitors C
capacitors labelled C
maximises the signal swing, hence slew rate at XTAL_IN, to which all on-chip clocks are referred. Crystal load
capacitance, C
Where:
Note:
11.3.3 Frequency Trim
BlueCore4-ROM CSP enables frequency adjustments to be made. This feature is typically used to remove initial
tolerance frequency errors associated with the crystal. Frequency trim is achieved by adjusting the crystal load
capacitance with on-chip trim capacitors, C
PSKEY_ANA_FTRIM (0x1f6). Its value is calculated as:
There are two C
appear in series so each least significant bit (LSB) increment of frequency trim presents a load across the crystal
of 55fF.
BC41B143A-ds-002Pd
C
C
C
trim
int
int
= 1.5pF
does not include the crystal internal self capacitance. It is the driver self capacitance.
= 3.4pF nominal (Mid range setting)
l
is calculated with the following equation:
trim
capacitors which are both connected to ground. When viewed from the crystal terminals they
t1
and C
t2
. C
This material is subject to CSR’s non-disclosure agreement
8MHz
t1
Min
-
-
should be three times the value of C
Figure 11.6: Crystal Equivalent Circuit
Equation 11.3: Load Capacitance
C
Equation 11.4: Trim Capacitance
Table 11.4: Crystal Specification
© Cambridge Silicon Radio Limited 2005
trim
trim
C
C
=
m
l
. The value of C
110
=
Production Information
C
int
fF
+
×
trim
PSKEY_ANA_
C
L
C
and C
trim
2
m
o
+
±20ppm/pF
trim
C
int
C
±25ppm
16MHz
. The remainder should be from the external
1 t
1 t
is set by a 6-bit word in the PS Key
Typ
+
⋅
R
C
C
m
2 t
FTRIM
2 t
t2
for best noise performance. This
Device Terminal Descriptions
32MHz
Max
-
-
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