BC41B143A-ANN-E4 ETC, BC41B143A-ANN-E4 Datasheet - Page 69

• Manufacturer Part Number: BC41B143A-ANN-E4
• Description: Bluecore 4-rom CSP EDR Single Chip Bluetooth v2.0 + EDR System
• Manufacturer: ETC

11.7.2 Long Frame Sync
Long Frame Sync is the name given to a clocking format that controls the transfer of PCM data words or
samples. In Long Frame Sync, the rising edge of PCM_SYNC indicates the start of the PCM word. When
BlueCore4-ROM CSP is configured as PCM Master, generating PCM_SYNC and PCM_CLK, then PCM_SYNC
is 8 bits long. When BlueCore4-ROM CSP is configured as PCM Slave, PCM_SYNC can be from two
consecutive falling edges of PCM_CLK to half the PCM_SYNC rate, that is 62.5μs long.
BlueCore4-ROM CSP samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising
edge. PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK in the LSB position
or on the rising edge.
11.7.3 Short Frame Sync
In Short Frame Sync the falling edge of PCM_SYNC indicates the start of the PCM word. PCM_SYNC is always
one clock cycle long.
BC41B143A-ds-002Pd
PCM_SYNC
PCM_SYNC
PCM_OUT
PCM_OUT
PCM_CLK
PCM_CLK
PCM_IN
PCM_IN
Figure 11.19: Long Frame Sync (Shown with 8-bit Companded Sample)
Undefined
Figure 11.20: Short Frame Sync (Shown with 16-bit Sample)
Figure 11.18: BlueCore4-ROM CSP as PCM Interface Slave
Undefined
This material is subject to CSR’s non-disclosure agreement
1
1
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2
BlueCore4-ROM
© Cambridge Silicon Radio Limited 2005
1
1
3
3
4
4
PCM_SYNC
2
2
PCM_OUT
PCM_CLK
Production Information
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5
PCM_IN
6
6
3
3
7
7
4
4
8
8
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9
5
5
Upto 2048kHz
8kHz
10 11 12 13 14 15 16
10 11 12 13 14 15 16
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8
Device Terminal Descriptions
Undefined
Undefined
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