S25FL004K Meet Spansion Inc., S25FL004K Datasheet - Page 27

• Manufacturer Part Number: S25FL004K
• Description: 4-mbit / 8-mbit / 16-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
• Manufacturer: Meet Spansion Inc.

7.2
7.3
July 14, 2011 S25FL004K-016K_00_02
Write Enable for Volatile Status Register (50h)
Write Disable (04h)
The non-volatile Status Register bits described in
to as volatile bits. This gives more flexibility to change the system configuration and memory protection
schemes quickly without waiting for the typical non-volatile bit write cycles or affecting the endurance of the
Status Register non-volatile bits. To write the volatile values into the Status Register bits, the Write Enable for
Volatile Status Register (50h) instruction must be issued prior to a Write Status Register (01h) instruction.
Write Enable for Volatile Status Register instruction
it is only valid for the Write Status Register instruction to change the volatile Status Register bit values.
The Write Disable instruction (Figure 6) resets the Write Enable Latch (WEL) bit in the Status Register to a 0.
The Write Disable instruction is entered by driving CS# low, shifting the instruction code “04h” into the SI pin
and then driving CS# high. Note that the WEL bit is automatically reset after Power-up and upon completion
of the Write Status Register, Erase/Program Security Registers, Page Program, Quad Page Program, Sector
Erase, Block Erase and Chip Erase instructions.
CS#
CLK
CS#
CLK
SO
SO
SI
SI
Figure 7.2 Write Enable for Volatile Status Register Instruction Sequence Diagram
Mode 3
Mode 0
Mode 3
Mode 0
D a t a
Figure 7.3 Write Disable Instruction Sequence Diagram
S25FL004K / S25FL008K / S25FL016K
S h e e t
0
0
1
1
2
Instruction (50h)
High Impedance
Instruction (04h)
High Impedance
2
Section 6.1, Status Register on page 16
3
(Figure
3
4
4
5
7.2) will not set the Write Enable Latch (WEL) bit,
6
5
7
6
7
Mode 0
Mode 3
Mode 3
Mode 0
can also be written
27