S25FL004K Meet Spansion Inc., S25FL004K Datasheet - Page 45

• Manufacturer Part Number: S25FL004K
• Description: 4-mbit / 8-mbit / 16-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
• Manufacturer: Meet Spansion Inc.

7.21
July 14, 2011 S25FL004K-016K_00_02
64 KB Block Erase (D8h)
The Block Erase instruction sets all memory within a specified block (64k-bytes) to the erased state of all 1s
(FFh). A Write Enable instruction must be executed before the device will accept the Block Erase Instruction
(Status Register bit WEL must equal 1). The instruction is initiated by driving the CS# pin low and shifting the
instruction code “D8h” followed a 24-bit block address (A23-A0). (See
for the block diagrams of S25FL004K, S25FL008K,and S25FL016K.) The Block Erase instruction sequence
is shown in
The CS# pin must be driven high after the eighth bit of the last byte has been latched. If this is not done the
Block Erase instruction will not be executed. After CS# is driven high, the self-timed Block Erase instruction
will commence for a time duration of t
Erase cycle is in progress, the Read Status Register instruction may still be accessed for checking the status
of the BUSY bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the cycle is finished
and the device is ready to accept other instructions again. After the Block Erase cycle has finished the Write
Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase instruction will not be executed
if the addressed sector is protected by the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0) bits (see
Table
6.2,
CLK
CS#
SO
SI
Table
Figure
= MSB
Mode 3
Mode 0
6.3, and
7.24.
Figure 7.24 64 kB Block Erase Instruction Sequence Diagram
D a t a
Table 6.4
S25FL004K / S25FL008K / S25FL016K
0
1
S h e e t
for Status Register Memory Protection (CMP = 0)).
2
Instruction (D8h)
BE
.
3
(See AC Electrical Characteristics on page
4
High Impedance
5
6
7
23
8
22
9
24-Bit Address
Section 1., Block Diagrams on page 9
2
29
1
30
64.) While the Block
0
31
Mode 3
Mode 0
45