S25FL004K Meet Spansion Inc., S25FL004K Datasheet - Page 32

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S25FL004K

Manufacturer Part Number
S25FL004K
Description
4-mbit / 8-mbit / 16-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
Manufacturer
Meet Spansion Inc.
Datasheet

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7.9
32
Fast Read Quad Output (6Bh)
The Fast Read Quad Output (6Bh) instruction is similar to the Fast Read Dual Output (3Bh) instruction except
that data is output on four pins, IO0, IO1, IO2, and IO3. A Quad enable of Status Register-2 must be executed
before the device will accept the Fast Read Quad Output Instruction (Status Register bit QE must equal 1).
The Fast Read Quad Output Instruction allows data to be transferred from the S25FL004K/S25FL008K/
S25FL016K at four times the rate of standard SPI devices.
The Fast Read Quad Output instruction can operate at the highest possible frequency of FR.
Electrical Characteristics on page
address as shown in
setting up the initial address. The input data during the dummy clocks is “don’t care”. However, the IO pins
should be high-impedance prior to the falling edge of the first data out clock.
CLK
CS
IO3
IO1
CLK
IO0
IO2
CS
IO1
IO3
IO0
IO2
Mode 3
Mode 0
Figure 7.9 Fast Read Quad Output Instruction Sequence Diagram
Figure
32
0
S25FL004K / S25FL008K / S25FL016K
7.9. The dummy clocks allow the device's internal circuits additional time for
33
1
34
Dummy Clocks
Instruction (6Bh)
2
64.) This is accomplished by adding eight “dummy” clocks after the 24-bit
35
3
36
4
37
D a t a
5
38
6
39
7
S h e e t
8
40
4
5
7
6
Byte 1 Byte 2
23
9
0
1
3
2
41
22
24-Bit Address
IO_0 Switches from Input to Output
10
4
5
7
6
42
21
0
1
3
2
43
28 29
4
5
6
Byte 3
7
S25FL004K-016K_00_02 July 14, 2011
3
44
1
2
0
3
30 31
45
2
4
5
6
Byte 4
7
1
46 47
0
1
3
2
0
4
5
6
7
(See AC

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