S25FL004K Meet Spansion Inc., S25FL004K Datasheet - Page 39

• Manufacturer Part Number: S25FL004K
• Description: 4-mbit / 8-mbit / 16-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
• Manufacturer: Meet Spansion Inc.

7.14
7.15
July 14, 2011 S25FL004K-016K_00_02
Set Burst with Wrap (77h)
Continuous Read Mode Bits (M7-0)
The Set Burst with Wrap (77h) instruction is used in conjunction with “Fast Read Quad I/O” and “Word Read
Quad I/O” instructions to access a fixed length of 8/16/32/64-byte section within a 256-byte page. Certain
applications can benefit from this feature and improve the overall system code execution performance.
Similar to a Quad I/O instruction, the Set Burst with Wrap instruction is initiated by driving the CS# pin low and
then shifting the instruction code “77h” followed by 24 dummy bits and 8 “Wrap Bits”, W7-0. The instruction
sequence is shown in
the lower nibble W3-0 are not used.
Once W6-4 is set by a Set Burst with Wrap instruction, all the following “Fast Read Quad I/O” and “Word
Read Quad I/O” instructions will use the W6-4 setting to access the 8/16/32/64-byte section within any page.
To exit the “Wrap Around” function and return to normal read operation, another Set Burst with Wrap
instruction should be issued to set W4 = 1. The default value of W4 upon power on is 1. In the case of a
system Reset while W4 = 0, it is recommended that the controller issues a Set Burst with Wrap instruction to
reset W4 = 1 prior to any normal Read instructions since S25FL004K/S25FL008K/S25FL016K does not have
a hardware Reset Pin.
The “Continuous Read Mode” bits are used in conjunction with “Fast Read Dual I/O”, “Fast Read Quad I/O”,
“Word Read Quad I/O” and “Octal Word Read Quad I/O” instructions to provide the highest random Flash
memory access rate with minimum SPI instruction overhead, thus allow true XIP (execute in place) to be
performed on serial flash devices.
M7-0 need to be set by the Dual/Quad I/O Read instructions. M5-4 are used to control whether the 8-bit SPI
instruction code (BBh, EBh, E7h or E3h) is needed or not for the next command. When M5-4 = (1,0), the next
command will be treated same as the current Dual/Quad I/O Read command without needing the 8-bit
instruction code; when M5-4 do not equal to (1,0), the device returns to normal SPI mode, all commands can
be accepted. M7-6 and M3-0 are reserved bits for future use, either 0 or 1 values can be used.
CS#
CLK
IO3
IO1
IO2
IO0
W6, W5
Mode 3
Mode 0
0 0
0 1
1 0
1 1
Figure 7.18, Set Burst with Wrap Instruction Sequence on page
0
D a t a
Figure 7.18 Set Burst with Wrap Instruction Sequence
S25FL004K / S25FL008K / S25FL016K
1
Wrap Around
Instruction (77h)
2
Yes
Yes
Yes
Yes
S h e e t
3
4
W4 = 0
5
Wrap Length
6
16-byte
32-byte
64-byte
8-byte
7
don’t care don’t care don’t care
X
X
X
X
8
X
X
X
X
9
X
X
X
10
X
Wrap Around
X
X
X
X
11
No
No
No
No
X
X
12
X
X
W4 =1 (DEFAULT)
X
X
X
X
13
w4
w5
w6
X
14
wrap bit
39. Wrap bit W7 and
15
X
X
X
X
Wrap Length
N/A
N/A
N/A
N/A
39