ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 119

• Manufacturer Part Number: ez80f92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS015313-0508
Table 54. UART Transmit Holding Registers(UART0_THR = 00C0h, UART1_THR =
UART Receive Buffer Register
The bits in this register reflect the data received. If less than eight bits are programmed for
receive, the lower bits of the byte reflect the bits received whereas upper unused bits are 0.
The receive FIFO is mapped at this address. If the FIFO is disabled, this buffer is only one
byte deep.
These registers share the same address space as the UARTx_THR and UARTx_BRG_L
registers. See
Table 55. UART Receive Buffer Registers(UART0_RBR = 00C0h, UART1_RBR =
00 D0h)
00D0h)
Bit
Reset
CPU Access
Note: W = Write only.
Bit
Position
[7:0]
T
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
R
x
x
D
D
Table
Value
00h–
FFh
Value
00h–
FFh
55.
Description
Transmit data byte.
Description
Receive data byte.
W
X
X
R
7
7
W
X
X
R
6
6
W
R
X
X
5
5
Universal Asynchronous Receiver/Transmitter
W
R
X
X
4
4
W
R
X
X
3
3
Product Specification
W
R
X
X
2
2
eZ80F92/eZ80F93
W
X
X
R
1
1
W
X
X
R
0
0
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