ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 68

• Manufacturer Part Number: ez80f92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS015313-0508
Signal timing for Intel
Read operation in
ures, each Intel bus mode state is 2 CPU system clock cycles in duration.
Figure 15
peripheral.
Figure 14. Example: Intel
System Clock
ADDR[23:0]
DATA[7:0]
or IORQ
READY
MREQ
CSx
ALE
WR
RD
on page 62 also display the assertion of one wait state (
Figure 14
TM
bus mode with multiplexed address and data is displayed for a
T1
TM
and for a Write operation in
Bus Mode Read Timing—Multiplexed Address and Data
T2
Bus
T3
Figure 15
T
WAIT
Chip Selects and Wait States
Product Specification
T
WAIT
on page 62. In the fig-
eZ80F92/eZ80F93
T4
) by the selected
Figure 14
and
61