ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 242
ez80f92
Manufacturer Part Number
ez80f92
Description
Ez80acclaim Flash Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F92.pdf
(261 pages)
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Table 151. External I/O Write Timing
PS015313-0508
External I/O Write Timing
Figure 61
transition timing is independent of the particular bus mode employed (eZ80
Intel
Parameter
T
T
T
T
T
T
T
T
T
ADDR[23:0]
1
2
3
4
5
6
7
8
9
DATA[7:0]
TM
(output)
IORQ
CSx
, or Motorola ® ).
X
WR
IN
and
Abbreviation
Clock Rise to ADDR Valid Delay
Clock Rise to ADDR Hold Time
Clock Fall to Output DATA Valid Delay
Clock Rise to DATA Hold Time
Clock Rise to CSx Assertion Delay
Clock Rise to CSx Deassertion Delay
Clock Rise to IORQ Assertion Delay
Clock Rise to IORQ Deassertion Delay
Clock Fall to WR Assertion Delay
Table 151
T
7
T
1
T
display the timing for external I/O writes. Clock rise/fall to signal
5
Figure 61.External I/O Write Timing
T
CLK
T
3
T
9
T
10
T
T
T
2
4
T
6
8
Product Specification
Min
Electrical Characteristics
2.0
2.0
2.0
2.0
2.0
2.0
1.8
—
—
Delay (ns)
®
, Z80
Max
19.0
18.0
16.0
16.0
6.5
13
11
—
—
®
,
234
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