ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 160

• Manufacturer Part Number: ez80f92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS015313-0508
I
2
C Registers
Addressing
The processor interface provides access to six 8-bit registers: four Read/Write registers,
one Read Only register and two Write Only registers, as listed in
Table 83. I
Resetting the
Hardware Reset—
I2C_SAR, I2C_XSAR, I2C_DR and I2C_CTL registers are cleared to 00h; while the
I2C_SR register is set to
Software Reset—
Reset Register (I2C_SRR). A software reset sets the I
and IFLG bits of the I2C_CTL register to 0.
I
The I2C_SAR register provides the 7-bit address of the I
allows 10-bit addressing in conjunction with the I2C_XSAR register. I2C_SAR[7:1] =
sla[6:0] is the 7-bit address of the I
this address after a START condition, it enters SLAVE mode. I2C_SAR[7] corresponds to
the first bit received from the I
When the register receives an address starting with
the I
after receiving the I2C_SAR byte (the device does not generate an interrupt at this point).
After the next byte of the address (I2C_XSAR) is received, the I
and goes into SLAVE mode. Then I2C_SAR[2:1] are used as the upper 2 bits for the 10-
bit extended address. The full 10-bit address is supplied by {I2C_SAR[2:1],
I2C_XSAR[7:0]}. See
Register
I2C_SAR
I2C_XSAR
I2C_DR
I2C_CTL
I2C_SR
I2C_CCR
I2C_SRR
2
C Slave Address Register
2
C recognizes that a 10-bit slave addressing mode is selected. The I
2
C Register Descriptions
I
2
C
Registers
Perform a software reset by writing any value to the I
Extended slave address register
Data byte register
Control register
Status register (Read Only)
Clock Control register (Write Only)
Software reset register (Write Only)
Description
Slave address register
When the I
Table 84
F8h
.
2
2
C bus.
C is reset by a hardware reset of the eZ80F92 device, the
on page 154.
2
C when in 7-bit SLAVE mode. When the I
F7h
2
C back to idle and the STP, STA,
to
2
C when in SLAVE mode and
F0h
(I2C_SAR[7:3] = 11110b),
Product Specification
2
Table
C generates an interrupt
I2C Serial I/O Interface
83.
2
2
C sends an ACK
C Software
2
C receives
153