ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 144

• Manufacturer Part Number: ez80f92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS015313-0508
Table 74. SPI Control Register(SPI_CTL = 00BAh)
SPI Status Register
The SPI Status Read Only register returns the status of data transmitted using the serial
peripheral interface. Reading the SPI_SR register clears Bits 7, 6, and 4 to a logical 0.
See
Table 75. SPI Status Register(SPI_SR = 00BBh)
Bit
Reset
CPU Access
Note: R = Read Only; R/W = Read/Write.
Bit
Position
7
IRQ_EN
6
5
SPI_EN
4
MASTER_EN
3
CPOL
2
CPHA
[1:0]
Bit
Reset
CPU Access
Note: R = Read Only.
Table
75.
Value Description
0
1
0
0
1
0
1
0
1
0
1
00
R/W
SPI system interrupt is disabled.
SPI system interrupt is enabled.
Reserved.
SPI is disabled.
SPI is enabled.
When enabled, the SPI operates as a slave.
When enabled, the SPI operates as a master.
Master SCK pin idles in a Low (0) state.
Master SCK pin idles in a High (1) state.
SS must go High after transfer of every byte of data.
SS can remain Low to transfer any number of data bytes.
Reserved.
R
7
0
7
0
R
R
6
0
6
0
R/W
R
5
0
5
0
R/W
R
4
0
4
0
R/W
R
3
0
3
0
Product Specification
Serial Peripheral Interface
R/W
R
2
1
2
0
eZ80F92/eZ80F93
R
R
1
0
1
0
R
R
0
0
0
0
137