at42qt1481 ATMEL Corporation, at42qt1481 Datasheet - Page 27

• Manufacturer Part Number: at42qt1481
• Description: 48-key Qmatrix Ic
• Manufacturer: ATMEL Corporation

4.3
4.4
9621B–AT42–06/11
Enter Setups Mode – 0x01
Low Level Cal and Offset – 0x02
This command is used to initiate the Setups block transfer from host to QT1481.
The command must be repeated twice within 110 ms or the command fails; the repeating
command must be sequential without any intervening command. After the second 0x01 from the
host, the QT1481 stops scanning keys and replies with the character 0xFE. This command
suspends normal sensing starting from the receipt of the second 0x01. A failure of the command
causes a timeout.
Each byte in the block must arrive at the QT1481 no later than 110 ms after the previous one or
a timeout occurs. Any timeout causes the QT1481 to cancel the block load and go back to
normal operation.
If no response comes back, the command was not received and the QT1481 should preferably
be reset by the host just in case there are any other problems.
If 0xFE is received by the host from the QT1481, then the host should begin to transmit the block
of Setups to the QT1481. The DRDY line handshakes the data. The delay between bytes can be
as short as 100 µs but the host can make it longer than this if required, but no more than
110 ms. The last two bytes the host should send is the CRC for the block of data only (the CRC
should not include the command in its calculation).
After the block transfer the QT1481 checks the CRC and responds with 0x00 if there was an
error. Regardless, it programs the internal EEPROM. If the CRC was correct it replies with a
second 0xFE after the EEPROM was programmed.
If there was an error in the block transfer the QT1481 restores the last known good Setups from
Flash memory the next time the QT1481 is reset. However until that point, the QT1481 attempts
to operate using the new Setups block even if it is corrupt. Note that some Setups do not take
effect until the part is reset (for example, baud rate).
At the end of the full block load sequence, the QT1481 restarts sensing without recalibration.
Most of the setups in the block take effect immediately, but it is important to reset the QT1481
after a block load to make all the changes effective and permanent. See
Command response timing: Responses to the bytes in the setups block (both DRDY and
return byte at the end) by the part can take as long as 20 ms each.
This command must be repeated twice within 110 ms or the command fails. The repeating
command must be sequential without any intervening command. After the second 0x02 from the
host, the QT1481 replies with the character 0xFD. Shortly thereafter the QT1481 performs a
calibration and offset procedure across all keys and restarts operation. If no 0xFD comes back,
the command was not properly received or a previous command 0x02 is still being processed.
This command takes up to 3 seconds to complete. The host can monitor the progress of the
calibration by checking the QT1481 status byte, using command 0x06, during the course of the
calibration. The calibration bit will be set throughout the process.
AT42QT1481
Section 4.6 on page
28.
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